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f2f9644830
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Added qerv files
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2026-02-25 20:52:07 +01:00 |
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13f72e698f
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jtag memory interface working
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2026-02-25 16:14:37 +01:00 |
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9930ce4461
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Working CPP way of writing data
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2026-02-24 16:40:17 +01:00 |
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8f4e887b9d
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Added JTAG interface with testbench
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2026-02-23 15:37:49 +01:00 |
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20cfece6e3
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Added soclet with gpio banks to top
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2026-02-22 20:00:42 +01:00 |
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5e951f9b61
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Working SERV cpu
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2026-02-22 18:48:17 +01:00 |
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ac6aea90b6
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Merge branch 'master' of ssh://git.joppeb.nl:222/joppe/fpga_modem
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2026-02-22 16:07:34 +01:00 |
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dc946cd793
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Moved serv to own tree
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2026-02-22 16:03:21 +01:00 |
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a261264fda
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Added serv and made a blinky testbench for it
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2026-02-21 19:24:18 +01:00 |
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Joppe Blondel
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49b8a77480
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Combined all sigmadelta things to one input block
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2025-10-19 20:03:51 +02:00 |
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Joppe Blondel
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165faefa59
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Added decimation
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2025-10-19 17:26:09 +02:00 |
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Joppe Blondel
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771fa58769
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Added K IIR lpf filter
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2025-10-19 17:02:29 +02:00 |
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Joppe Blondel
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b2858ac5ee
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Added mul tb and fixed
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2025-10-19 16:18:40 +02:00 |
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Joppe Blondel
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eb7caaf2c5
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Added PLL/clock generator and SD RC model
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2025-10-19 15:36:55 +02:00 |
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Joppe Blondel
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3b04f3a6be
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Added lvds and sampler
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2025-10-08 18:01:03 +02:00 |
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Jojojoppe
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324bb108e3
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Added planahead script and fixed conversion
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2025-10-06 16:49:28 +02:00 |
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Jojojoppe
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06ef70e1ee
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Improved NCO: 200MHz
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2025-10-06 16:25:40 +02:00 |
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Jojojoppe
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1e9d7b7680
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Got rid of ftw_we and tested on hw with freq sweep
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2025-10-05 23:42:51 +02:00 |
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Jojojoppe
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83cc449c6f
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Using remotesyn and added NCO
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2025-10-05 23:20:25 +02:00 |
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