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jtagram

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new_structure

remotesyn

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• a6a5c6ea3f Made timer synthesizable new_structure Joppe Blondel 2026-03-01 21:11:08 +01:00
• 5b940758b6 Added formal verification set to timer internally Joppe Blondel 2026-03-01 21:00:57 +01:00
• abe0668787 new timer Joppe Blondel 2026-03-01 17:16:44 +01:00
• 7b46ae5e87 Some cleanup and added formal for the banks and timer Joppe Blondel 2026-03-01 14:12:12 +01:00
• 8289b0d090 Added wb formal script and added other sby tasks Joppe Blondel 2026-03-01 13:52:41 +01:00
• cf483decad Added everything from the other system Joppe Blondel 2026-02-28 21:46:59 +01:00
• 907f244b24 Added libjtag_wb_bridge Joppe Blondel 2026-02-28 18:39:50 +01:00
• cf7e03b9fe Added some stuff from modem and added formal Joppe Blondel 2026-02-28 18:23:39 +01:00
• fa641b1eab Initial commit Joppe Blondel 2026-02-28 13:52:08 +01:00
• 105dbed8e4 Added back in the jtag bridge master Joppe Blondel 2026-02-27 17:39:43 +01:00
• 6f680377db jtag memory selectable Joppe Blondel 2026-02-27 16:09:33 +01:00
• 3a9b2acf9e New wishbone-jtag bridge Joppe Blondel 2026-02-27 15:56:56 +01:00
• 838204653a TImer working with tests Joppe Blondel 2026-02-25 22:01:28 +01:00
• 3a3c951409 Added timer, still wip Joppe Blondel 2026-02-25 20:54:12 +01:00
• f2f9644830 Added qerv files Joppe Blondel 2026-02-25 20:52:07 +01:00
• 13f72e698f jtag memory interface working Joppe Blondel 2026-02-25 16:14:37 +01:00
• 9930ce4461 Working CPP way of writing data Joppe Blondel 2026-02-24 16:40:17 +01:00
• 8f4e887b9d Added JTAG interface with testbench Joppe Blondel 2026-02-23 15:37:49 +01:00
• 9322766cef vibed jtagram with script as drop in replacement of serving_ram jtagram Joppe Blondel 2026-02-22 21:27:40 +01:00
• 20cfece6e3 Added soclet with gpio banks to top Joppe Blondel 2026-02-22 20:00:42 +01:00
• a97028c2ba cleanup Joppe Blondel 2026-02-22 18:49:03 +01:00
• 5e951f9b61 Working SERV cpu Joppe Blondel 2026-02-22 18:48:17 +01:00
• ac6aea90b6 Merge branch 'master' of ssh://git.joppeb.nl:222/joppe/fpga_modem Joppe Blondel 2026-02-22 16:07:34 +01:00
• dc946cd793 Moved serv to own tree Joppe Blondel 2026-02-22 16:03:21 +01:00
• a261264fda Added serv and made a blinky testbench for it Joppe Blondel 2026-02-21 19:24:18 +01:00
• 49b8a77480 Combined all sigmadelta things to one input block Joppe Blondel 2025-10-19 20:03:51 +02:00
• 165faefa59 Added decimation Joppe Blondel 2025-10-19 17:19:08 +02:00
• 85d9979e2d Added decimation remotesyn Joppe Blondel 2025-10-19 17:19:08 +02:00
• 771fa58769 Added K IIR lpf filter Joppe Blondel 2025-10-19 17:02:29 +02:00
• b2858ac5ee Added mul tb and fixed Joppe Blondel 2025-10-19 16:18:40 +02:00
• eb7caaf2c5 Added PLL/clock generator and SD RC model Joppe Blondel 2025-10-19 15:36:55 +02:00
• 3b04f3a6be Added lvds and sampler Joppe Blondel 2025-10-08 18:01:03 +02:00
• 324bb108e3 Added planahead script and fixed conversion Jojojoppe 2025-10-06 16:49:28 +02:00
• 06ef70e1ee Improved NCO: 200MHz Jojojoppe 2025-10-06 16:25:40 +02:00
• 1e9d7b7680 Got rid of ftw_we and tested on hw with freq sweep Jojojoppe 2025-10-05 23:42:51 +02:00
• 83cc449c6f Using remotesyn and added NCO Jojojoppe 2025-10-05 23:20:25 +02:00
• 639541728f Added decimator Jojojoppe 2025-10-01 21:52:21 +02:00
• e0151d093f Added sampler and RC model Jojojoppe 2025-10-01 21:15:20 +02:00
• ee58fccba4 Added pll to simulation Jojojoppe 2025-10-01 17:24:53 +02:00
• 42e9bd0a0a initial commit Jojojoppe 2025-10-01 16:40:05 +02:00