joppe/fpga_modem
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5e951f9b6188fa903456d0290db67a3194b38a03
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2 Commits

Author SHA1 Message Date
Joppe Blondel
49b8a77480 Combined all sigmadelta things to one input block 2025-10-19 20:03:51 +02:00
Joppe Blondel
eb7caaf2c5 Added PLL/clock generator and SD RC model 2025-10-19 15:36:55 +02:00