joppe/fpga_modem
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14 Commits 2 Branches 0 Tags
49b8a774807a867e46abd824d6713c2d63d2d369
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2 Commits

Author SHA1 Message Date
Joppe Blondel
b2858ac5ee Added mul tb and fixed 2025-10-19 16:18:40 +02:00
Joppe Blondel
eb7caaf2c5 Added PLL/clock generator and SD RC model 2025-10-19 15:36:55 +02:00