joppe/fpga_modem
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20cfece6e313754d9ad817933af9cf4102a49c46
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2 Commits

Author SHA1 Message Date
Joppe Blondel
5e951f9b61 Working SERV cpu 2026-02-22 18:48:17 +01:00
Joppe Blondel
eb7caaf2c5 Added PLL/clock generator and SD RC model 2025-10-19 15:36:55 +02:00