Logo
Explore Help
Sign In
joppe/fpga_modem
Watch 1
Star 0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
29 Commits 1 Branch 0 Tags
105dbed8e4e7015a786bd827dd2a4fbaa19666ae
Commit Graph
6 Commits
Author SHA1 Message Date
Joppe Blondel 5e951f9b61 Working SERV cpu 2026-02-22 18:48:17 +01:00
Joppe Blondel ac6aea90b6 Merge branch 'master' of ssh://git.joppeb.nl:222/joppe/fpga_modem 2026-02-22 16:07:34 +01:00
Joppe Blondel dc946cd793 Moved serv to own tree 2026-02-22 16:03:21 +01:00
Joppe Blondel 49b8a77480 Combined all sigmadelta things to one input block 2025-10-19 20:03:51 +02:00
Joppe Blondel eb7caaf2c5 Added PLL/clock generator and SD RC model 2025-10-19 15:36:55 +02:00
Jojojoppe 324bb108e3 Added planahead script and fixed conversion 2025-10-06 16:49:28 +02:00
Powered by Gitea Version: 1.27.3 Page: 56ms Template: 8ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API