This website requires JavaScript.
Explore
Help
Sign In
joppe
/
fpga_modem
Watch
1
Star
0
Fork
0
You've already forked fpga_modem
Code
Issues
Pull Requests
Actions
Packages
Projects
Releases
Wiki
Activity
29
Commits
4
Branches
0
Tags
105dbed8e4e7015a786bd827dd2a4fbaa19666ae
Commit Graph
5 Commits
Author
SHA1
Message
Date
Joppe Blondel
9930ce4461
Working CPP way of writing data
2026-02-24 16:40:17 +01:00
Joppe Blondel
8f4e887b9d
Added JTAG interface with testbench
2026-02-23 15:37:49 +01:00
Joppe Blondel
5e951f9b61
Working SERV cpu
2026-02-22 18:48:17 +01:00
Joppe Blondel
eb7caaf2c5
Added PLL/clock generator and SD RC model
2025-10-19 15:36:55 +02:00
Joppe Blondel
3b04f3a6be
Added lvds and sampler
2025-10-08 18:01:03 +02:00