Added sampler and RC model

2025-10-01 21:15:20 +02:00
parent ee58fccba4
commit e0151d093f
17 changed files with 319 additions and 13 deletions
--- a/IP/gw_clkdiv8/gw_clkdiv8.v
+++ b/IP/gw_clkdiv8/gw_clkdiv8.v
@@ -0,0 +1,29 @@
+//Copyright (C)2014-2025 Gowin Semiconductor Corporation.
+//All rights reserved.
+//File Title: IP file
+//Tool Version: V1.9.12
+//Part Number: GW1NSR-LV4CQN48PC7/I6
+//Device: GW1NSR-4C
+//Created Time: Wed Oct  1 18:23:11 2025
+
+module gw_clkdiv8 (clkout, hclkin, resetn);
+
+output clkout;
+input hclkin;
+input resetn;
+
+wire gw_gnd;
+
+assign gw_gnd = 1'b0;
+
+CLKDIV clkdiv_inst (
+    .CLKOUT(clkout),
+    .HCLKIN(hclkin),
+    .RESETN(resetn),
+    .CALIB(gw_gnd)
+);
+
+defparam clkdiv_inst.DIV_MODE = "8";
+defparam clkdiv_inst.GSREN = "false";
+
+endmodule //gw_clkdiv8