joppe/fpga_modem
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
2 Commits 1 Branch 0 Tags
ee58fccba4a42172f79850c8e1f69b4797d22803
T
Clone
Open with VS Code Open with VSCodium Open with Intellij IDEA
Download ZIP Download TAR.GZ Download BUNDLE
Jojojoppe ee58fccba4 Added pll to simulation
2025-10-01 17:24:53 +02:00
CON
Added pll to simulation
2025-10-01 17:24:53 +02:00
HW
Added pll to simulation
2025-10-01 17:24:53 +02:00
IP/gw_pllvr
Added pll to simulation
2025-10-01 17:24:53 +02:00
scripts
Added pll to simulation
2025-10-01 17:24:53 +02:00
SIM
Added pll to simulation
2025-10-01 17:24:53 +02:00
.gitignore
initial commit
2025-10-01 16:40:05 +02:00
modem.gprj
Added pll to simulation
2025-10-01 17:24:53 +02:00
modem.gprj.user
Added pll to simulation
2025-10-01 17:24:53 +02:00
S
Description
No description provided
924 KiB
Languages
Verilog 69.3%
C++ 15.9%
Python 8.2%
SystemVerilog 2%
C 1.3%
Other 3.3%