Joppe Blondel dc946cd793 Moved serv to own tree

2026-02-22 16:03:21 +01:00

boards/mimas_v1

Using remotesyn and added NCO

2025-10-05 23:20:25 +02:00

rtl

Moved serv to own tree

2026-02-22 16:03:21 +01:00

scripts

Added planahead script and fixed conversion

2025-10-06 16:49:28 +02:00

sim

Moved serv to own tree

2026-02-22 16:03:21 +01:00

sw/blinky

Moved serv to own tree

2026-02-22 16:03:21 +01:00

.gitignore

Using remotesyn and added NCO

2025-10-05 23:20:25 +02:00

.gitmodules

Moved serv to own tree

2026-02-22 16:03:21 +01:00

project.cfg

Moved serv to own tree

2026-02-22 16:03:21 +01:00

S

Description

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924 KiB

Languages

Verilog 69.3%

C++ 15.9%

Python 8.2%

SystemVerilog 2%

C 1.3%

Other 3.3%