joppe/fpga_modem
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
b2858ac5eea0571ed3309c91c19a05dc6f5510a1
fpga_modem/rtl/arch
History
Joppe Blondel eb7caaf2c5 Added PLL/clock generator and SD RC model
2025-10-19 15:36:55 +02:00
..
gw1
Added lvds and sampler
2025-10-08 18:01:03 +02:00
spartan-6
Added PLL/clock generator and SD RC model
2025-10-19 15:36:55 +02:00