This website requires JavaScript.
Explore
Help
Sign In
joppe
/
fpga_modem
Watch
1
Star
0
Fork
0
You've already forked fpga_modem
Code
Issues
Pull Requests
Actions
Packages
Projects
Releases
Wiki
Activity
Files
b2858ac5eea0571ed3309c91c19a05dc6f5510a1
fpga_modem
/
boards
/
mimas_v1
History
Joppe Blondel
eb7caaf2c5
Added PLL/clock generator and SD RC model
2025-10-19 15:36:55 +02:00
..
ip
Added PLL/clock generator and SD RC model
2025-10-19 15:36:55 +02:00
constraints.ucf
Added PLL/clock generator and SD RC model
2025-10-19 15:36:55 +02:00
