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85d9979e2d7d34971ead214fc31fd8f5d106f369
fpga_modem
/
rtl
/
toplevel
/
top_generic.v
Joppe Blondel
eb7caaf2c5
Added PLL/clock generator and SD RC model
2025-10-19 15:36:55 +02:00
1.5 KiB
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