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fpga_modem
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838204653a578e49cdc80dad21ecb46c525978ac
fpga_modem
/
rtl
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Joppe Blondel
838204653a
TImer working with tests
...
TODO: think of other way of shifting in data. Bit errors make uploading difficult
2026-02-25 22:01:28 +01:00
..
arch
Working CPP way of writing data
2026-02-24 16:40:17 +01:00
core
TImer working with tests
2026-02-25 22:01:28 +01:00
qerv
Added qerv files
2026-02-25 20:52:07 +01:00
serv
Working SERV cpu
2026-02-22 18:48:17 +01:00
toplevel
TImer working with tests
2026-02-25 22:01:28 +01:00
util
Working SERV cpu
2026-02-22 18:48:17 +01:00
wb
TImer working with tests
2026-02-25 22:01:28 +01:00