This website requires JavaScript.
Explore
Help
Sign In
joppe
/
fpga_modem
Watch
1
Star
0
Fork
0
You've already forked fpga_modem
Code
Issues
Pull Requests
Actions
Packages
Projects
Releases
Wiki
Activity
Files
838204653a578e49cdc80dad21ecb46c525978ac
fpga_modem
/
boards
/
mimas_v1
History
Joppe Blondel
8f4e887b9d
Added JTAG interface with testbench
2026-02-23 15:37:49 +01:00
..
ip
Added PLL/clock generator and SD RC model
2025-10-19 15:36:55 +02:00
constraints.ucf
Added JTAG interface with testbench
2026-02-23 15:37:49 +01:00
