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joppe
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fpga_modem
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3a3c951409fc35de4c625fec5987e4d69c0b40b4
fpga_modem
/
rtl
History
Joppe Blondel
3a3c951409
Added timer, still wip
2026-02-25 20:54:12 +01:00
..
arch
Working CPP way of writing data
2026-02-24 16:40:17 +01:00
core
Added timer, still wip
2026-02-25 20:54:12 +01:00
qerv
Added qerv files
2026-02-25 20:52:07 +01:00
serv
Working SERV cpu
2026-02-22 18:48:17 +01:00
toplevel
Added timer, still wip
2026-02-25 20:54:12 +01:00
util
Working SERV cpu
2026-02-22 18:48:17 +01:00
wb
Added timer, still wip
2026-02-25 20:54:12 +01:00