This website requires JavaScript.
Explore
Help
Sign In
joppe
/
fpga_modem
Watch
1
Star
0
Fork
0
You've already forked fpga_modem
Code
Issues
Pull Requests
Actions
Packages
Projects
Releases
Wiki
Activity
Files
20cfece6e313754d9ad817933af9cf4102a49c46
fpga_modem
/
boards
/
mimas_v1
History
Joppe Blondel
5e951f9b61
Working SERV cpu
2026-02-22 18:48:17 +01:00
..
ip
Added PLL/clock generator and SD RC model
2025-10-19 15:36:55 +02:00
constraints.ucf
Working SERV cpu
2026-02-22 18:48:17 +01:00