13 Commits

Include renames

Author	SHA1	Message	Date
Joppe Blondel	13f72e698f	jtag memory interface working	2026-02-25 16:14:37 +01:00
Joppe Blondel	9930ce4461	Working CPP way of writing data	2026-02-24 16:40:17 +01:00
Joppe Blondel	8f4e887b9d	Added JTAG interface with testbench	2026-02-23 15:37:49 +01:00
Joppe Blondel	20cfece6e3	Added soclet with gpio banks to top	2026-02-22 20:00:42 +01:00
Joppe Blondel	5e951f9b61	Working SERV cpu	2026-02-22 18:48:17 +01:00
Joppe Blondel	ac6aea90b6	Merge branch 'master' of ssh://git.joppeb.nl:222/joppe/fpga_modem	2026-02-22 16:07:34 +01:00
Joppe Blondel	dc946cd793	Moved serv to own tree	2026-02-22 16:03:21 +01:00
Joppe Blondel	a261264fda	Added serv and made a blinky testbench for it	2026-02-21 19:24:18 +01:00
Joppe Blondel	eb7caaf2c5	Added PLL/clock generator and SD RC model	2025-10-19 15:36:55 +02:00
Jojojoppe	324bb108e3	Added planahead script and fixed conversion	2025-10-06 16:49:28 +02:00
Jojojoppe	06ef70e1ee	Improved NCO: 200MHz	2025-10-06 16:25:40 +02:00
Jojojoppe	1e9d7b7680	Got rid of ftw_we and tested on hw with freq sweep	2025-10-05 23:42:51 +02:00
Jojojoppe	83cc449c6f	Using remotesyn and added NCO	2025-10-05 23:20:25 +02:00