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joppe
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fpga_modem
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8f4e887b9d44c2ffef319db32a417e26d4c24dee
Commit Graph
4 Commits
Author
SHA1
Message
Date
Joppe Blondel
8f4e887b9d
Added JTAG interface with testbench
2026-02-23 15:37:49 +01:00
Joppe Blondel
5e951f9b61
Working SERV cpu
2026-02-22 18:48:17 +01:00
Joppe Blondel
eb7caaf2c5
Added PLL/clock generator and SD RC model
2025-10-19 15:36:55 +02:00
Jojojoppe
83cc449c6f
Using remotesyn and added NCO
2025-10-05 23:20:25 +02:00