joppe/fpga_modem
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85d9979e2d7d34971ead214fc31fd8f5d106f369
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2 Commits

Author SHA1 Message Date
Joppe Blondel
eb7caaf2c5 Added PLL/clock generator and SD RC model 2025-10-19 15:36:55 +02:00
Joppe Blondel
3b04f3a6be Added lvds and sampler 2025-10-08 18:01:03 +02:00