joppe/fpga_modem
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28 Commits 1 Branch 0 Tags
6f680377db27f97ece2a269c524dc3f24f383f90
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6 Commits
Author SHA1 Message Date
Joppe Blondel 8f4e887b9d Added JTAG interface with testbench 2026-02-23 15:37:49 +01:00
Joppe Blondel 5e951f9b61 Working SERV cpu 2026-02-22 18:48:17 +01:00
Joppe Blondel ac6aea90b6 Merge branch 'master' of ssh://git.joppeb.nl:222/joppe/fpga_modem 2026-02-22 16:07:34 +01:00
Joppe Blondel a261264fda Added serv and made a blinky testbench for it 2026-02-21 19:24:18 +01:00
Joppe Blondel eb7caaf2c5 Added PLL/clock generator and SD RC model 2025-10-19 15:36:55 +02:00
Joppe Blondel 3b04f3a6be Added lvds and sampler 2025-10-08 18:01:03 +02:00