joppe/fpga_modem
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165faefa59d6dd69a246376efc083ae2e489f5bc
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2 Commits

Author SHA1 Message Date
Joppe Blondel
eb7caaf2c5 Added PLL/clock generator and SD RC model 2025-10-19 15:36:55 +02:00
Jojojoppe
324bb108e3 Added planahead script and fixed conversion 2025-10-06 16:49:28 +02:00