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08c0f6967b
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Trigger selection
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2026-03-05 16:24:29 +01:00 |
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cfdec1aec7
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Added trigger to scope
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2026-03-05 16:13:26 +01:00 |
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e0a276cd18
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control register instead of reset output
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2026-03-05 15:21:41 +01:00 |
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b0582e63bc
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Signal scope
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2026-03-05 15:06:09 +01:00 |
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8cccea85e0
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Added adc->dac path test
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2026-03-04 23:35:02 +01:00 |
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4e3521e94a
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Added missing signal modules
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2026-03-02 19:28:36 +01:00 |
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50f71a2985
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Added new master checker and changed to synchronous reset checks
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2026-03-02 18:02:47 +01:00 |
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628972ccaa
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New slave checker and updated gpio and gpio_banks
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2026-03-02 13:48:30 +01:00 |
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a6a5c6ea3f
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Made timer synthesizable
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2026-03-01 21:11:08 +01:00 |
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5b940758b6
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Added formal verification set to timer internally
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2026-03-01 21:00:57 +01:00 |
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abe0668787
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new timer
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2026-03-01 17:19:46 +01:00 |
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7b46ae5e87
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Some cleanup and added formal for the banks and timer
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2026-03-01 14:12:12 +01:00 |
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8289b0d090
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Added wb formal script and added other sby tasks
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2026-03-01 13:52:41 +01:00 |
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cf483decad
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Added everything from the other system
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2026-02-28 21:52:06 +01:00 |
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907f244b24
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Added libjtag_wb_bridge
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2026-02-28 18:39:50 +01:00 |
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cf7e03b9fe
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Added some stuff from modem and added formal
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2026-02-28 18:23:39 +01:00 |
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fa641b1eab
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Initial commit
Added nco_q15
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2026-02-28 13:52:08 +01:00 |
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