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Added mul tb and fixed

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Joppe Blondel
2025-10-19 16:18:40 +02:00
parent eb7caaf2c5
commit b2858ac5ee
5 changed files with 136 additions and 17 deletions
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5
rtl/core/sigmadelta_rcmodel_q15.v
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@@ -12,7 +12,7 @@
// -- clk : input clock
// -- resetn : reset signal
// -- sd_sample : 1 bit sample output from sd sampler
// -- sample_q15 : output samples in q1.15
// -- sample_q15 : output samples in q.15
// =============================================================================
module sigmadelta_rcmodel_q15 #(
parameter integer alpha_q15 = 16'sh0b00
@@ -25,9 +25,10 @@ module sigmadelta_rcmodel_q15 #(
reg signed [15:0] y_q15;
wire signed [15:0] sd_q15 = sd_sample ? 16'sh7fff : 16'sh0000;
wire signed [15:0] e_q15 = sd_q15 - y_q15;
// wire signed [31:0] prod_q30 = $signed(e_q15) * $signed(alpha_q15);
wire signed [31:0] prod_q30;
// Use shift-add algorithm for multiplication
mul_const_shiftadd #(.C(alpha_q15)) alpha_times_e (e_q15, prod_q30);
mul_const_shiftadd #(.C($signed(alpha_q15))) alpha_times_e ($signed(e_q15), prod_q30);
wire signed [15:0] y_next_q15 = y_q15 + (prod_q30>>>15);
// clamp to [0, 0x7FFF] (keeps signal view tidy)