TImer working with tests

TODO: think of other way of shifting in data. Bit errors make uploading difficult

sim/tb/tb_top_generic.v

@@ -11,7 +11,7 @@ module tb_top_generic();
 
     // 100 MHz board input clock
     initial aclk = 1'b0;
-    always #5 aclk = ~aclk;
+    always #33.33 aclk = ~aclk;
 
     // Hold reset low, then release
     initial begin
@@ -39,7 +39,7 @@ module tb_top_generic();
         $dumpvars(0, tb_top_generic);
 
         // Let firmware run for a while.
-        #5_000_000;
+        #2_000_000;
         $finish;
     end
 endmodule