joppe/fpga_modem
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Jojojoppe
2025-10-01 16:40:05 +02:00
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//Copyright (C)2014-2025 GOWIN Semiconductor Corporation.
//All rights reserved.
//File Title: Timing Constraints file
//Tool Version: V1.9.12
//Created Time: 2025-10-01 13:43:45
create_clock -name CLK_IN -period 37.037 -waveform {0 18.518} [get_ports {clk}]