Added timer, still wip

rtl/toplevel/top_generic.v

@@ -1,6 +1,8 @@
 `timescale 1ns/1ps
 
-module top_generic(
+module top_generic #(
+    parameter sim = 0
+)(
     input wire aclk,
     input wire aresetn,
 
@@ -11,9 +13,6 @@ module top_generic(
     output wire[7:0] LED
 );
     `include "conv.vh"
-    assign led_green = 1'b0;
-    assign led_red = 1'b0;
-    assign LED = 8'h00;
 
     // Clocking
     wire clk_100;
@@ -29,8 +28,11 @@ module top_generic(
     wire [31:0] GPIO_C;
     wire [31:0] GPIO_D;
 
+    wire test;
+
     mcu #(
-        .memfile("../sw/sweep/sweep.hex")
+        .memfile("../sw/sweep/sweep.hex"),
+        .sim(sim)
     ) mcu (
         .i_clk(clk_15),
         .i_rst(!aresetn),
@@ -41,7 +43,8 @@ module top_generic(
         .o_GPO_A(GPIO_A),
         .o_GPO_B(GPIO_B),
         .o_GPO_C(GPIO_C),
-        .o_GPO_D(GPIO_D)
+        .o_GPO_D(GPIO_D),
+        .o_test(test)
     );
 
 
@@ -64,4 +67,8 @@ module top_generic(
         dac_code <= q15_to_uq16(sin_q15) >> 10;
     end
     assign r2r = dac_code;
+
+    assign LED = GPIO_B[7:0];
+    assign led_green = GPIO_C[0];
+    assign led_red = test;
 endmodule