jtag memory interface working

sim/tb/tb_svf.v

@@ -1,24 +1,28 @@
 `timescale 1ns/1ps
 
 module tb_svf();
+    reg clk;
+    reg resetn;
+    initial clk <= 1'b0;
+    initial resetn <= 1'b0;
+    always #33.33 clk <= !clk;
+    initial #40 resetn <= 1'b1;
+
     wire [7:0] led_out;
-    wire [31:0] update_count;
 
     jtag_byte_sink #(
         .SVF_FILE("sim/other/test.svf"),
-        .TCK_HALF_PERIOD_NS(50)
+        .TCK_HALF_PERIOD_NS(500)
     ) dut (
-        .o_led(led_out),
-        .o_update_count(update_count)
+        .i_clk(clk),
+        .i_rst(!resetn),
+        .o_led(led_out)
     );
 
     initial begin
-        // Optional waveform dump.
         $dumpfile("out.vcd");
         $dumpvars;
-
-        // Timeout for large SVF playback.
-        #20_000;
+        #200_000;
         $finish;
     end
 endmodule
@@ -27,9 +31,14 @@ module jtag_byte_sink #(
     parameter [8*256-1:0] SVF_FILE = "",
     parameter integer TCK_HALF_PERIOD_NS = 50
 )(
-    output reg [7:0] o_led,
-    output reg [31:0] o_update_count
+    input wire i_clk,
+    input wire i_rst,
+    output reg [7:0] o_led
 );
+
+    initial o_led <= 0;
+
+    // JTAG interface wires
     wire jtag_tck;
     wire jtag_tdi;
     wire jtag_drck;
@@ -39,10 +48,10 @@ module jtag_byte_sink #(
     wire jtag_runtest;
     wire jtag_reset;
     wire jtag_sel;
-    wire jtag_tdo;
-    reg [7:0] shift_reg;
 
-    assign jtag_tdo = shift_reg[0];
+    reg [41:0] jtag_q;
+    reg [41:0] jtag_data;
+    wire jtag_async_reset;
 
     jtag_if #(
         .chain(1),
@@ -50,7 +59,7 @@ module jtag_byte_sink #(
         .TCK_HALF_PERIOD_NS(TCK_HALF_PERIOD_NS),
         .USER_IR_OPCODE(32'h0000_0002)
     ) jtag (
-        .i_tdo(jtag_tdo),
+        .i_tdo(jtag_q[0]),
         .o_tck(jtag_tck),
         .o_tdi(jtag_tdi),
         .o_drck(jtag_drck),
@@ -62,29 +71,36 @@ module jtag_byte_sink #(
         .o_sel(jtag_sel)
     );
 
-    always @(posedge jtag_drck or posedge jtag_reset) begin
-        if (jtag_reset) begin
-            shift_reg <= 8'h00;
+
+    assign jtag_async_reset = jtag_reset || i_rst;
+
+    always @(posedge jtag_drck or posedge jtag_async_reset) begin
+        if (jtag_async_reset) begin
+            jtag_q <= 0;
         end else if (jtag_sel && jtag_capture) begin
-            shift_reg <= o_led;
+            jtag_q <= jtag_data;
         end else if (jtag_sel && jtag_shift) begin
-            shift_reg <= {jtag_tdi, shift_reg[7:1]};
+            jtag_q <= {jtag_tdi, jtag_q[41:1]};
         end
     end
 
-    always @(posedge jtag_update or posedge jtag_reset) begin
-        if (jtag_reset) begin
-            o_led <= 8'h00;
-            o_update_count <= 32'd0;
+    always @(posedge jtag_update or posedge jtag_async_reset) begin
+        if (jtag_async_reset) begin
+            jtag_data <= 0;
         end else if (jtag_sel) begin
-            o_led <= shift_reg;
-            o_update_count <= o_update_count + 1'b1;
+            jtag_data <= jtag_q;
         end
     end
 
-    // Keep lint happy for currently unused outputs.
-    wire _unused_tck;
-    wire _unused_runtest;
-    assign _unused_tck = jtag_tck;
-    assign _unused_runtest = jtag_runtest;
+    wire [41:0] j_data;
+    wire j_data_update;
+    cdc_strobed #(42) j_data_cdc (
+        .i_clk_a(i_clk),
+        .i_clk_b(i_clk),
+        .i_data(jtag_data),
+        .i_strobe(jtag_update),
+        .o_data(j_data),
+        .o_strobe(j_data_update)
+    );
+
 endmodule