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Added gcc make toolchain for remote compilation

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Signed-off-by: Joppe Blondel <joppe@blondel.nl>
This commit is contained in:
Joppe Blondel
2022-09-08 13:58:03 +02:00
parent 7c5351b9c3
commit 15d7e8b801
5 changed files with 89 additions and 5 deletions
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11
examples/zynq7000/SW/Makefile
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@ -2,9 +2,10 @@
TARGET := app.elf
BUILDROOT ?= $(shell pwd)
BUILDDIR := build
SRCDIRS := src
SRCDIRS := $(BUILDROOT)/src
SRCFILESC := $(shell find $(SRCDIRS) -type f -name "*.c")
OBJFILESC := $(SRCFILESC:%.c=$(BUILDDIR)/%.c.o) $(BUILDDIR)/src/ps7_init.o
DEPFILESC := $(SRCFILESC:%.c=$(BUILDDIR)/%.c.d)
@ -25,8 +26,8 @@ LD := $(CROSS_COMPILE)gcc
CC_WARNING := -Wall -Wextra
CC_LIBS := -lgcc
CC_FLAGS := -nostdlib -fno-builtin -g -mcpu=cortex-a9
CC_INCLUDES := -I src -I ../OUT/ip/zynqps
LD_FLAGS := -Wl,-Tlinker.ld
CC_INCLUDES := -I $(BUILDROOT)/src -I $(BUILDROOT)/../OUT/ip/zynqps
LD_FLAGS := -Wl,-T$(BUILDROOT)/linker.ld
.PHONY: $(TARGET) all clean
all: $(TARGET)
@ -48,10 +49,10 @@ $(BUILDDIR)/$(TARGET): $(OBJFILES)
$(LD) $(CC_FLAGS) $(LD_FLAGS) -o $(BUILDDIR)/$(TARGET) $(OBJFILES) $(CC_LIBS)
$(XILINX_BASE)/bin/$(CROSS_COMPILE)objdump -D $(BUILDDIR)/$(TARGET) > DISASS
$(BUILDDIR)/src/ps7_init.o : ../OUT/ip/zynqps/ps7_init.c ../OUT/ip/zynqps/ps7_init.h
$(BUILDDIR)/src/ps7_init.o : $(BUILDROOT)/../OUT/ip/zynqps/ps7_init.c $(BUILDROOT)/../OUT/ip/zynqps/ps7_init.h
echo 'CC ' $@
-mkdir -p $(shell dirname $@)
$(CC) $(CC_FLAGS) $(CC_WARNING) $(CC_INCLUDES) -MD -o $(BUILDDIR)/src/ps7_init.o -c ../OUT/ip/zynqps/ps7_init.c
$(CC) $(CC_FLAGS) $(CC_WARNING) $(CC_INCLUDES) -MD -o $(BUILDDIR)/src/ps7_init.o -c $(BUILDROOT)/../OUT/ip/zynqps/ps7_init.c
$(OBJFILES): $(BUILDDIR)/%.c.o: %.c
echo 'CC ' $@

9
examples/zynq7000/SW/src/boot.S
View File

@ -75,6 +75,15 @@ _start:
ldr sp, =__proc0_svc_stack /* load SVC mode stack pointer */
/* We are now in SVC mode */
// Disable L1 cache
mov r0, #0
mcr p15, 0, r0, c7, c7, 0 // Invalidate cache
mcr p15, 0, r0, c8, c7, 0 // Invalidate tlb
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x1000
bic r0, r0, #0x0004
mcr p15, 0, r0, c1, c0, 0
/* Set vector table base address */
ldr r0, =vectortable
mcr p15, #0, r0, c12, c0, #0

1
examples/zynq7000/SW/src/main.c
View File

@ -12,4 +12,5 @@ void main(){
printf("Hello World!\n");
for(;;);
}

24
examples/zynq7000/project.cfg
View File

@ -90,4 +90,28 @@ files_verilog = OUT/synth/impl_netlist.v
#files_sysverilog =
#files_xci =
files_other = OUT/synth/impl_netlist.sdf
# ######################################
# ######################################
# Firmware compilation
[target.firmware]
toolchain = gccmake
# Toolchain settings
output_files = build/app.elf DISASS
buildroot = SW
# Fileset
files_makefile = SW/Makefile
files_other = SW/linker.ld
SW/src/boot.S
SW/src/main.c
SW/src/printf.c
SW/src/printf.h
SW/src/uart.c
SW/src/uart.h
SW/src/xil_io.h
SW/src/zynq.h
OUT/ip/zynqps/ps7_init.c
OUT/ip/zynqps/ps7_init.h
# ######################################