7 lines
371 B
Tcl
7 lines
371 B
Tcl
create_project project_1 tmpplanahead -part xc6slx9tqg144-2 -force
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set_property design_mode GateLvl [current_fileset]
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add_files -norecurse ../out/synth/synth.ngc
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import_files -force -norecurse
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import_files -fileset constrs_1 -force -norecurse ../boards/mimas_v1/constraints.ucf
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import_as_run -run impl_1 -twx ../out/synth/timing.twx ../out/synth/synth.ncd
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open_run impl_1 |