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joppe
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fpga_modem
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fpga_modem
/
rtl
/
wb
History
Joppe Blondel
105dbed8e4
Added back in the jtag bridge
...
Now talking over the bus instead of using dpram
2026-02-27 17:39:43 +01:00
..
jtag_wb_bridge.v
Added back in the jtag bridge
2026-02-27 17:39:43 +01:00
wb_arbiter.v
Added back in the jtag bridge
2026-02-27 17:39:43 +01:00
wb_gpio_banks.v
Added soclet with gpio banks to top
2026-02-22 20:00:42 +01:00
wb_gpio.v
Added soclet with gpio banks to top
2026-02-22 20:00:42 +01:00
wb_mux.v
Added timer, still wip
2026-02-25 20:54:12 +01:00
wb_timer.v
Added timer, still wip
2026-02-25 20:54:12 +01:00