vibed jtagram with script as drop in replacement of serving_ram
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49
rtl/arch/spartan-6/jtag_tap_spartan6.v
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49
rtl/arch/spartan-6/jtag_tap_spartan6.v
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`default_nettype none
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// Spartan-6 JTAG TAP wrapper with an architecture-neutral interface.
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// Re-implement this module for other FPGA families with the same port list.
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module jtag_tap_spartan6
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#(parameter USER_CHAIN = 1)
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(
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output wire o_drck,
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output wire o_capture,
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output wire o_shift,
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output wire o_update,
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output wire o_reset,
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output wire o_sel,
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output wire o_tdi,
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input wire i_tdo
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);
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wire drck1;
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wire drck2;
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wire sel1;
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wire sel2;
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wire tdo1;
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wire tdo2;
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localparam USE_CHAIN2 = (USER_CHAIN == 2);
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assign o_drck = USE_CHAIN2 ? drck2 : drck1;
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assign o_sel = USE_CHAIN2 ? sel2 : sel1;
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assign tdo1 = USE_CHAIN2 ? 1'b0 : i_tdo;
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assign tdo2 = USE_CHAIN2 ? i_tdo : 1'b0;
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BSCAN_SPARTAN6
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#(.JTAG_CHAIN(USER_CHAIN))
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bscan_spartan6
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(
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.CAPTURE(o_capture),
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.DRCK1(drck1),
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.DRCK2(drck2),
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.RESET(o_reset),
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.SEL1(sel1),
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.SEL2(sel2),
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.SHIFT(o_shift),
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.TDI(o_tdi),
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.UPDATE(o_update),
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.TDO1(tdo1),
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.TDO2(tdo2)
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);
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endmodule
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