jtag memory selectable

2026-02-27 16:09:33 +01:00
parent 3a9b2acf9e
commit 6f680377db
4 changed files with 36 additions and 17 deletions
--- a/rtl/toplevel/top_generic.v
+++ b/rtl/toplevel/top_generic.v
@@ -52,7 +52,8 @@ module top_generic #(

    mcu #(
        .memfile("../sw/sweep/sweep.hex"),
-        .sim(sim)
+        .sim(sim),
+        .jtag(1)
    ) mcu (
        .i_clk(clk_15),
        .i_rst(sys_reset),