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jtag memory selectable

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This commit is contained in:
Joppe Blondel
2026-02-27 16:09:33 +01:00
parent 3a9b2acf9e
commit 6f680377db
4 changed files with 36 additions and 17 deletions
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47
rtl/core/mcu.v
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@@ -4,7 +4,8 @@
module mcu #(
parameter memfile = "",
parameter memsize = 8192,
parameter sim = 1'b0
parameter sim = 1'b0,
parameter jtag = 1
)(
input wire i_clk,
input wire i_rst,
@@ -149,20 +150,36 @@ module mcu #(
.o_wb_ack(wb_mem_ack)
);
memory #(
.memfile(memfile),
.depth(memsize),
.sim(sim)
) mem (
.i_clk(i_clk),
.i_rst(i_rst),
.i_waddr(sram_waddr),
.i_wdata(sram_wdata),
.i_wen(sram_wen),
.i_raddr(sram_raddr),
.o_rdata(sram_rdata),
.o_core_reset(rst_mem_reason)
);
if(jtag) begin
memory_jtag #(
.memfile(memfile),
.depth(memsize),
.sim(sim)
) mem (
.i_clk(i_clk),
.i_rst(i_rst),
.i_waddr(sram_waddr),
.i_wdata(sram_wdata),
.i_wen(sram_wen),
.i_raddr(sram_raddr),
.o_rdata(sram_rdata),
.o_core_reset(rst_mem_reason)
);
end else begin
serving_ram #(
.memfile(memfile),
.depth(memsize),
.sim(sim)
) mem (
.i_clk(i_clk),
.i_waddr(sram_waddr),
.i_wdata(sram_wdata),
.i_wen(sram_wen),
.i_raddr(sram_raddr),
.o_rdata(sram_rdata)
);
assign rst_mem_reason = 1'b0;
end
mcu_peripherals peripherals (
.i_clk(i_clk),