118 lines
2.6 KiB
C
118 lines
2.6 KiB
C
#include "boot.h"
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/*
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* 6850 ACIA test wiring assumption:
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* /CS2 is driven by not-A5, so the ACIA is selected when A5 = 1.
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* RS is assumed to be wired to A0, giving:
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* 0x20 = status/control
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* 0x21 = data
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*/
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#define ACIA_CTRL_STATUS 0x20
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#define ACIA_DATA 0x21
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#define ACIA_STATUS_RDRF 0x01
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#define ACIA_STATUS_TDRE 0x02
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#define ACIA_CMD_MASTER_RESET 0x03
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#define ACIA_CMD_8N1_DIV1 0x14
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/*
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* Z80 CTC wiring assumption:
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* /CE is driven by not-A4, so use 0x10 as the base address.
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* A0 and A1 select channels 0 through 3.
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*/
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#define CTC_CHANNEL_0 0x10
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#define CTC_CHANNEL_1 0x11
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#define CTC_CHANNEL_2 0x12
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#define CTC_CHANNEL_3 0x13
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#define CTC_CMD_RESET 0x03
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#define CTC_CMD_COUNTER_RISING 0x4F
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#define CTC_TEST_TIME_CONSTANT 52
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static void acia_init(void)
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{
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io_out(ACIA_CTRL_STATUS, ACIA_CMD_MASTER_RESET);
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io_out(ACIA_CTRL_STATUS, ACIA_CMD_8N1_DIV1);
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}
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static void ctc_init(void)
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{
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/* Leave unused channels in reset. */
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io_out(CTC_CHANNEL_1, CTC_CMD_RESET);
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io_out(CTC_CHANNEL_2, CTC_CMD_RESET);
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io_out(CTC_CHANNEL_3, CTC_CMD_RESET);
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/*
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* Channel 0: counter mode, rising-edge trigger, no interrupt. CLK/TRG0
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* must be connected to the 500 kHz clock. Writing the time constant
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* starts the counter, and ZC/TO0 produces a pulse at:
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*
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* 500000 / 52 = 9615.4 Hz
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*
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* This is the closest integer division to 9600 Hz (about +0.16%).
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*/
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io_out(CTC_CHANNEL_0, CTC_CMD_COUNTER_RISING);
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io_out(CTC_CHANNEL_0, CTC_TEST_TIME_CONSTANT);
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}
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static uint8_t acia_status(void)
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{
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return io_in(ACIA_CTRL_STATUS);
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}
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static void acia_putc(uint8_t value)
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{
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while ((acia_status() & ACIA_STATUS_TDRE) == 0) {
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}
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io_out(ACIA_DATA, value);
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}
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static uint8_t acia_getc_nonblocking(uint8_t *value)
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{
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if ((acia_status() & ACIA_STATUS_RDRF) == 0) {
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return 0;
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}
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*value = io_in(ACIA_DATA);
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return 1;
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}
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static void acia_puts(const char *text)
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{
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while (*text) {
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acia_putc((uint8_t)*text++);
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}
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}
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void main(void)
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{
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uint8_t cnt = 0;
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uint8_t ch = 0;
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io_out(PIO_A_CTRL, 0x0F);
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io_out(PIO_A_DATA, 0x00);
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ctc_init();
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acia_init();
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acia_puts("ACIA 6850 test ready\r\n");
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for (;;) {
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uint8_t status = acia_status();
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if (acia_getc_nonblocking(&ch)) {
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io_out(PIO_A_DATA, ch);
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acia_putc(ch);
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if (ch == '\r') {
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acia_putc('\n');
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}
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delay_ms(50);
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}
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acia_putc((uint8_t)('0' + (cnt & 0x07)));
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acia_puts("\r\n");
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cnt++;
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delay_ms(250);
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}
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}
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