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V1 of z80 cpu card

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This commit is contained in:
Joppe Blondel
2026-08-27 17:04:14 +02:00
parent 0195978c47
commit 3408539beb
178 changed files with 17700 additions and 4146 deletions
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39
main.c
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@@ -14,12 +14,46 @@
#define ACIA_STATUS_TDRE 0x02
#define ACIA_CMD_MASTER_RESET 0x03
#define ACIA_CMD_8N1_DIV16 0x15
#define ACIA_CMD_8N1_DIV1 0x14
/*
* Z80 CTC wiring assumption:
* /CE is driven by not-A4, so use 0x10 as the base address.
* A0 and A1 select channels 0 through 3.
*/
#define CTC_CHANNEL_0 0x10
#define CTC_CHANNEL_1 0x11
#define CTC_CHANNEL_2 0x12
#define CTC_CHANNEL_3 0x13
#define CTC_CMD_RESET 0x03
#define CTC_CMD_COUNTER_RISING 0x4F
#define CTC_TEST_TIME_CONSTANT 52
static void acia_init(void)
{
io_out(ACIA_CTRL_STATUS, ACIA_CMD_MASTER_RESET);
io_out(ACIA_CTRL_STATUS, ACIA_CMD_8N1_DIV16);
io_out(ACIA_CTRL_STATUS, ACIA_CMD_8N1_DIV1);
}
static void ctc_init(void)
{
/* Leave unused channels in reset. */
io_out(CTC_CHANNEL_1, CTC_CMD_RESET);
io_out(CTC_CHANNEL_2, CTC_CMD_RESET);
io_out(CTC_CHANNEL_3, CTC_CMD_RESET);
/*
* Channel 0: counter mode, rising-edge trigger, no interrupt. CLK/TRG0
* must be connected to the 500 kHz clock. Writing the time constant
* starts the counter, and ZC/TO0 produces a pulse at:
*
* 500000 / 52 = 9615.4 Hz
*
* This is the closest integer division to 9600 Hz (about +0.16%).
*/
io_out(CTC_CHANNEL_0, CTC_CMD_COUNTER_RISING);
io_out(CTC_CHANNEL_0, CTC_TEST_TIME_CONSTANT);
}
static uint8_t acia_status(void)
@@ -59,6 +93,7 @@ void main(void)
io_out(PIO_A_CTRL, 0x0F);
io_out(PIO_A_DATA, 0x00);
ctc_init();
acia_init();
acia_puts("ACIA 6850 test ready\r\n");