Pre autoroute internal

This commit is contained in:
2026-08-27 15:13:58 +02:00
parent d495f187b0
commit 0195978c47
75 changed files with 11252 additions and 3671 deletions

File diff suppressed because it is too large Load Diff

View File

@@ -1,11 +1,11 @@
{
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"active_layer_preset": "",
"auto_track_width": true,
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@@ -54,7 +54,7 @@
"ly_points"
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"git": {
"integration_disabled": false,

View File

@@ -39,9 +39,9 @@
"other_text_thickness": 0.15,
"other_text_upright": false,
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},
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"silk_text_italic": false,
@@ -53,7 +53,7 @@
"border_display_style": 2,
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"hatch_gap": 1.5,
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@@ -150,7 +150,7 @@
"min_connection": 0.0,
"min_copper_edge_clearance": 0.5,
"min_groove_width": 0.0,
"min_hole_clearance": 0.25,
"min_hole_clearance": 0.1,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.2,
"min_microvia_drill": 0.1,
@@ -158,10 +158,10 @@
"min_silk_clearance": 0.0,
"min_text_height": 0.8,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.2,
"min_via_annular_width": 0.1,
"min_via_diameter": 0.5,
"min_through_hole_diameter": 0.15,
"min_track_width": 0.0889,
"min_via_annular_width": 0.05,
"min_via_diameter": 0.25,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
@@ -214,7 +214,8 @@
0.254,
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"tuning_pattern_settings": {
"diff_pair_defaults": {
@@ -520,7 +521,7 @@
"classes": [
{
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"clearance": 0.25,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
@@ -531,11 +532,26 @@
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 2147483647,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"track_width": 0.3,
"tuning_profile": "",
"via_diameter": 0.6,
"via_diameter": 0.5,
"via_drill": 0.3,
"wire_width": 6
},
{
"clearance": 0.4,
"diff_pair_gap": 0.25,
"diff_pair_width": 0.2,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Power",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 0,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.6,
"tuning_profile": "",
"via_diameter": 0.75,
"via_drill": 0.3
}
],
"meta": {
@@ -543,7 +559,16 @@
},
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
"netclass_patterns": [
{
"netclass": "Power",
"pattern": "+5V"
},
{
"netclass": "Power",
"pattern": "GND"
}
]
},
"pcbnew": {
"last_paths": {
@@ -704,7 +729,7 @@
"uuid": "ec13de96-039a-4546-bd8e-3dc8bd747a7e"
}
],
"used_designators": "U1-6,R1-15,J1-2,D1-8,C1-7,Y1,#PWR1-32",
"used_designators": "#PWR1-32,Y1,C1-8,D1-8,J1-2,R1-15,U1-6",
"variants": []
},
"sheets": [

View File

@@ -7304,6 +7304,12 @@
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@@ -7346,6 +7352,12 @@
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@@ -12949,6 +13001,88 @@
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(uuid "20f65d76-8850-4747-aac2-1d6d0bedd0de")
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@@ -0,0 +1 @@
{"hostname":"DanielJackson","username":"joppe"}

View File

@@ -0,0 +1 @@
{"hostname":"DanielJackson","username":"joppe"}