working irl decoding

2026-10-09 14:51:56 +02:00
parent b8c6eaf4c9
commit c84b3fdc97
7 changed files with 352 additions and 70 deletions
@@ -0,0 +1,199 @@
+Name     casette;
+PartNo   00;
+Date     2026-10-03;
+Revision 01;
+Designer joppe;
+Company  unknown;
+Assembly None;
+Location unknown;
+Device   g22v10;
+
+
+/* ------------------------------------------------------------
+   Constants
+   ------------------------------------------------------------ */
+
+ar = 'b'0;
+sp = 'b'0;
+
+
+/* ------------------------------------------------------------
+   Pin assignments
+
+   Physical signals IOSEL, RD and WR are active-low.
+   Their polarity is expressed in the equations with !.
+   ------------------------------------------------------------ */
+
+/* inputs */
+
+PIN 1 = CLK;
+
+PIN 2 = A1;
+PIN 3 = A2;
+
+PIN 4 = IOSEL;
+PIN 5 = RD;
+PIN 6 = A0;
+
+PIN 7 = COMP;
+PIN 8 = WR;
+
+
+/* data bus */
+
+PIN 14 = D0;
+PIN 15 = D1;
+PIN 16 = D2;
+PIN 17 = D3;
+PIN 18 = D4;
+PIN 19 = D5;
+PIN 20 = D6;
+PIN 21 = D7;
+
+
+/* registered output */
+
+PIN 22 = LED;
+
+
+/* ------------------------------------------------------------
+   Read register at offset 0
+
+   Conditions:
+
+       /IOSEL = 0
+       /RD    = 0
+       /WR    = 1
+       A2:A0  = 000
+
+   Result:
+
+       D0     = COMP
+       D7..D1 = 0
+   ------------------------------------------------------------ */
+
+D0 = COMP;
+
+D1 = 'b'0;
+D2 = 'b'0;
+D3 = 'b'0;
+D4 = 'b'0;
+D5 = 'b'0;
+D6 = 'b'0;
+D7 = 'b'0;
+
+
+D0.OE =
+      !IOSEL
+    & !RD
+    &  WR
+    & !A2
+    & !A1
+    & !A0;
+
+D1.OE =
+      !IOSEL
+    & !RD
+    &  WR
+    & !A2
+    & !A1
+    & !A0;
+
+D2.OE =
+      !IOSEL
+    & !RD
+    &  WR
+    & !A2
+    & !A1
+    & !A0;
+
+D3.OE =
+      !IOSEL
+    & !RD
+    &  WR
+    & !A2
+    & !A1
+    & !A0;
+
+D4.OE =
+      !IOSEL
+    & !RD
+    &  WR
+    & !A2
+    & !A1
+    & !A0;
+
+D5.OE =
+      !IOSEL
+    & !RD
+    &  WR
+    & !A2
+    & !A1
+    & !A0;
+
+D6.OE =
+      !IOSEL
+    & !RD
+    &  WR
+    & !A2
+    & !A1
+    & !A0;
+
+D7.OE =
+      !IOSEL
+    & !RD
+    &  WR
+    & !A2
+    & !A1
+    & !A0;
+
+
+/* ------------------------------------------------------------
+   Writable LED register
+
+   Write conditions:
+
+       /IOSEL = 0
+       /RD    = 1
+       /WR    = 0
+       A2:A0  = 000
+
+   During such a write:
+
+       LED.D = D0
+
+   Otherwise:
+
+       LED.D = LED
+
+   Pin 1 (CLK) clocks the registered macrocell.
+   ------------------------------------------------------------ */
+
+LED.D =
+      (
+          !IOSEL
+        &  RD
+        & !WR
+        & !A2
+        & !A1
+        & !A0
+        &  D0
+      )
+
+    #
+
+      (
+          (
+              IOSEL
+            # !RD
+            #  WR
+            #  A2
+            #  A1
+            #  A0
+          )
+        & LED
+      );
+
+
+LED.ar = ar;
+LED.sp = sp;