start of tape loading. hw works and have a generation script

boot.asm

@@ -1,7 +1,5 @@
 STACK_TOP = 0xFFFF
 DELAY_LOOPS_PER_MS = 40
-RESIDENT_BASE = 0xC000
-RESIDENT_ROM_SOURCE = 0x0080
 BANK_CONTROL_PORT = 0x00
 BOOT_BANK_MAPPING = 0x06   ; ROM on, banking on, upper 16K at C000-FFFF
 ROM_DISABLE_BIT = 0x01
@@ -24,6 +22,7 @@ BANK_MODE_CLEAR_MASK = 0xF9 ; preserve ROM-disable and auxiliary outputs
         .globl _bios_init
         .globl _bios_bank
         .globl _bios_rom_disable
+        .globl _bios_rom_enable
         .globl _bank_control_shadow
         .globl resident_image_end
         .globl s__DATA
@@ -44,34 +43,34 @@ boot_copy:
         ld a, #BOOT_BANK_MAPPING
         out (BANK_CONTROL_PORT), a
         ld sp, #STACK_TOP
-        ld hl, #RESIDENT_ROM_SOURCE
-        ld de, #RESIDENT_BASE
-        ld bc, #(resident_image_end - RESIDENT_BASE)
+        ld hl, #RESIDENT_ROM_OFFSET
+        ld de, #RESIDENT_RAM_BASE
+        ld bc, #(resident_image_end - RESIDENT_RAM_BASE)
         ldir
         jp init
 
 .area _ITABLE (ABS)
 
 ; The executable vector page is part of the image copied to high RAM.
-.org RESIDENT_BASE
+.org RESIDENT_RAM_BASE
         jp init
-.org RESIDENT_BASE + 0x08
+.org RESIDENT_RAM_BASE + 0x08
         reti
-.org RESIDENT_BASE + 0x10
+.org RESIDENT_RAM_BASE + 0x10
         reti
-.org RESIDENT_BASE + 0x18
+.org RESIDENT_RAM_BASE + 0x18
         reti
-.org RESIDENT_BASE + 0x20
+.org RESIDENT_RAM_BASE + 0x20
         reti
-.org RESIDENT_BASE + 0x28
+.org RESIDENT_RAM_BASE + 0x28
         reti
-.org RESIDENT_BASE + 0x30
+.org RESIDENT_RAM_BASE + 0x30
         reti
-.org RESIDENT_BASE + 0x38
+.org RESIDENT_RAM_BASE + 0x38
         reti
 
 ; IM 2 table: the CTC supplies vectors 40, 42, 44, and 46.
-.org RESIDENT_BASE + 0x40
+.org RESIDENT_RAM_BASE + 0x40
         .dw ctc_isr          ; CTC channel 0: vector 0x40
         .dw ctc_isr          ; CTC channel 1: vector 0x42
         .dw ctc_isr          ; CTC channel 2: vector 0x44
@@ -80,7 +79,7 @@ boot_copy:
 ; Stable BIOS jump table for ROM-resident applications.
 ; C050 putc(A), C053 try_getc(), C056 getc(), C059 io_out(A,L),
 ; C05C io_in(A), C05F delay_ms(HL), C062 monitor warm start,
-; C065 bank(A), C068 disable ROM.
+; C065 bank(A), C068 disable ROM, C06B enable ROM.
 .org BIOS_PUTC
         jp bios_service_putc
 .org BIOS_TRY_GETC
@@ -99,11 +98,13 @@ boot_copy:
         jp _bios_bank
 .org BIOS_ROM_DISABLE
         jp _bios_rom_disable
+.org BIOS_ROM_ENABLE
+        jp _bios_rom_enable
 
 ; Port 00 is write-only.  Keep its last BIOS-managed value outside the C data
 ; areas so a monitor warm start does not reset it.  The bootstrap establishes
 ; this same value in the hardware before the resident image is copied.
-.org RESIDENT_BASE + 0x70
+.org RESIDENT_RAM_BASE + 0x70
 _bank_control_shadow::
         .db BOOT_BANK_MAPPING
 
@@ -184,16 +185,21 @@ bios_bank_update:
         pop     af
         ret
 
-; Permanently hide ROM until reset, preserving the selected RAM mapping.
+; Hide ROM while preserving the selected RAM mapping.
 ; A and flags are preserved.
 _bios_rom_disable::
         push    af
         ld      a, (_bank_control_shadow)
         or      #ROM_DISABLE_BIT
-        ld      (_bank_control_shadow), a
-        out     (BANK_CONTROL_PORT), a
-        pop     af
-        ret
+        jr      bios_bank_update
+
+; Make ROM visible again while preserving the selected RAM mapping.
+; A and flags are preserved.
+_bios_rom_enable::
+        push    af
+        ld      a, (_bank_control_shadow)
+        and     #0xFE
+        jr      bios_bank_update
 
 ; BIOS ABI services preserve registers except documented return values.
 bios_service_putc: