start of tape loading. hw works and have a generation script
This commit is contained in:
Joppe Blondel
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Name casette;
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PartNo 00;
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Date 2026-10-03;
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Revision 01;
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Designer joppe;
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Company unknown;
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Assembly None;
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Location unknown;
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Device g22v10;
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/* ------------------------------------------------------------
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Constants
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------------------------------------------------------------ */
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ar = 'b'0;
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sp = 'b'0;
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/* ------------------------------------------------------------
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Pin assignments
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Physical signals IOSEL, RD and WR are active-low.
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Their polarity is expressed in the equations with !.
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------------------------------------------------------------ */
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/* inputs */
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PIN 1 = CLK;
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PIN 2 = A1;
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PIN 3 = A2;
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PIN 4 = IOSEL;
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PIN 5 = RD;
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PIN 6 = A0;
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PIN 7 = COMP;
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PIN 8 = WR;
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/* data bus */
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PIN 14 = D0;
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PIN 15 = D1;
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PIN 16 = D2;
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PIN 17 = D3;
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PIN 18 = D4;
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PIN 19 = D5;
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PIN 20 = D6;
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PIN 21 = D7;
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/* registered output */
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PIN 22 = LED;
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/* ------------------------------------------------------------
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Read register at offset 0
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Conditions:
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/IOSEL = 0
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/RD = 0
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/WR = 1
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A2:A0 = 000
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Result:
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D0 = COMP
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D7..D1 = 0
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------------------------------------------------------------ */
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D0 = COMP;
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D1 = 'b'0;
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D2 = 'b'0;
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D3 = 'b'0;
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D4 = 'b'0;
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D5 = 'b'0;
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D6 = 'b'0;
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D7 = 'b'0;
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D0.OE =
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!IOSEL
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& !RD
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& WR
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& !A2
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& !A1
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& !A0;
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D1.OE =
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!IOSEL
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& !RD
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& WR
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& !A2
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& !A1
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& !A0;
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D2.OE =
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!IOSEL
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& !RD
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& WR
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& !A2
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& !A1
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& !A0;
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D3.OE =
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!IOSEL
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& !RD
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& WR
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& !A2
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& !A1
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& !A0;
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D4.OE =
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!IOSEL
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& !RD
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& WR
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& !A2
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& !A1
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& !A0;
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D5.OE =
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!IOSEL
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& !RD
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& WR
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& !A2
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& !A1
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& !A0;
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D6.OE =
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!IOSEL
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& !RD
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& WR
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& !A2
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& !A1
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& !A0;
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D7.OE =
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!IOSEL
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& !RD
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& WR
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& !A2
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& !A1
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& !A0;
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/* ------------------------------------------------------------
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Writable LED register
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Write conditions:
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/IOSEL = 0
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/RD = 1
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/WR = 0
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A2:A0 = 000
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During such a write:
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LED.D = D0
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Otherwise:
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LED.D = LED
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Pin 1 (CLK) clocks the registered macrocell.
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------------------------------------------------------------ */
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LED.D =
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(
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!IOSEL
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& RD
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& !WR
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& !A2
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& !A1
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& !A0
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& D0
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)
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#
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(
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(
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IOSEL
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# !RD
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# WR
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# A2
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# A1
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# A0
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)
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& LED
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);
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LED.ar = ar;
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LED.sp = sp;
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@@ -0,0 +1,54 @@
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CUPL(WM) 5.0a Serial# MW-10400000
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Device g22v10 Library DLIB-h-40-1
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Created Sat Oct 03 16:22:02 2026
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Name casette
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Partno 00
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Revision 01
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Date 2026-10-03
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Designer joppe
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Company unknown
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Assembly None
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Location unknown
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*QP24
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*QF5892
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*G1
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*F0
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*L00416 00000000000000000000000011111111
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*L00448 11111111111111111111111111111111
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*L00480 11111111101110111011011110111111
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*L00512 10111111110111111111111011110111
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*L00544 11111111111111111111111111111111
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*L00576 11101111111110111111111111111111
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*L00608 11111111111111101111111111111111
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*L00640 11110111111111111111111111100111
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*L00672 11111111111111111111111111111111
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*L00704 11110110111111111111111111111111
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*L00736 11111111111111111110111111111111
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*L00768 01111111111111111111111100000000
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*L00896 00000000000000000000000000001111
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*L00928 10111011101110111011111101111111
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*L00960 11111111000000000000000000000000
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*L01472 00000000000000000000000011111011
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*L01504 10111011101110111111011111111111
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*L01536 11110000000000000000000000000000
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*L02144 00000000000011111011101110111011
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*L02176 10111111011111111111111100000000
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*L02880 00000000000000000000000011111011
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*L02912 10111011101110111111011111111111
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*L02944 11110000000000000000000000000000
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*L03648 00001111101110111011101110111111
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*L03680 01111111111111110000000000000000
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*L04288 00000000000000000000000011111011
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*L04320 10111011101110111111011111111111
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*L04352 11110000000000000000000000000000
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*L04864 00000000000000000000111110111011
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*L04896 10111011101111110111111111111111
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*L05344 00000000000000000000000011111011
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*L05376 10111011101110111111011111111111
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*L05408 11111111111111111111111111110111
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*L05440 11111111111111110000000000000000
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*L05792 00000000000000000010111111111111
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*L05824 11110011000000110000000000000000
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*C5BE4
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*6A87
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@@ -0,0 +1,189 @@
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#!/usr/bin/env python3
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"""
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z80_tape_encode.py
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Encode a binary file as a mono PCM WAV using robust two-tone Manchester FSK.
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Defaults:
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- 48 kHz sample rate
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- 600 bit/s
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- 2 kHz / 4 kHz tones
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- Manchester FSK:
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0 -> low tone for half a bit, then high tone
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1 -> high tone for half a bit, then low tone
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- 1 second 4 kHz leader
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- 64 bytes of 0x55 preamble
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- 256-byte CRC-protected blocks
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- CRC-16/CCITT-FALSE
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"""
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from __future__ import annotations
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import argparse
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import math
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import struct
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import wave
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from pathlib import Path
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SYNC = b"\xD3\x91"
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PREAMBLE_BYTE = 0x55
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def crc16_ccitt_false(data: bytes) -> int:
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crc = 0xFFFF
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for byte in data:
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crc ^= byte << 8
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for _ in range(8):
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crc = ((crc << 1) ^ 0x1021) & 0xFFFF if (crc & 0x8000) else (crc << 1) & 0xFFFF
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return crc
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class FSKWriter:
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def __init__(self, sample_rate: int, baud: int, f_low: float, f_high: float, amplitude: float):
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if sample_rate % (2 * baud) != 0:
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raise ValueError("sample_rate must be divisible by 2*baud")
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self.sample_rate = sample_rate
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self.baud = baud
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self.f_low = f_low
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self.f_high = f_high
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self.amplitude = amplitude
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self.samples_per_half_bit = sample_rate // (2 * baud)
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self.phase = 0.0
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self.samples = bytearray()
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def _tone(self, frequency: float, sample_count: int) -> None:
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phase_step = 2.0 * math.pi * frequency / self.sample_rate
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scale = int(32767 * self.amplitude)
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phase = self.phase
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out = self.samples
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for _ in range(sample_count):
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sample = int(round(scale * math.sin(phase)))
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out.extend(struct.pack("<h", sample))
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phase += phase_step
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if phase >= 2.0 * math.pi:
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phase -= 2.0 * math.pi
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self.phase = phase
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def leader(self, seconds: float) -> None:
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self._tone(self.f_high, round(seconds * self.sample_rate))
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def bit(self, value: int) -> None:
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# Manchester-FSK:
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# 0 = low -> high
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# 1 = high -> low
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if value:
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first, second = self.f_high, self.f_low
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else:
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first, second = self.f_low, self.f_high
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self._tone(first, self.samples_per_half_bit)
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self._tone(second, self.samples_per_half_bit)
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def byte(self, value: int) -> None:
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# MSB first
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for bit_no in range(7, -1, -1):
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self.bit((value >> bit_no) & 1)
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def bytes(self, data: bytes) -> None:
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for value in data:
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self.byte(value)
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def make_block(sequence: int, payload: bytes) -> bytes:
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header = struct.pack("<HH", sequence & 0xFFFF, len(payload))
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crc = crc16_ccitt_false(header + payload)
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return SYNC + header + payload + struct.pack("<H", crc)
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def make_eof_block(sequence: int) -> bytes:
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header = struct.pack("<HH", sequence & 0xFFFF, 0)
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crc = crc16_ccitt_false(header)
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return SYNC + header + struct.pack("<H", crc)
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def encode(
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input_path: Path,
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output_path: Path,
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*,
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sample_rate: int = 48_000,
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baud: int = 600,
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f_low: float = 2_000.0,
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f_high: float = 4_000.0,
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leader_seconds: float = 1.0,
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preamble_bytes: int = 64,
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block_size: int = 256,
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amplitude: float = 0.75,
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) -> None:
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data = input_path.read_bytes()
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if not 0 < amplitude <= 1.0:
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raise ValueError("amplitude must be > 0 and <= 1")
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if not 1 <= block_size <= 0xFFFF:
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raise ValueError("block_size must be in 1..65535")
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writer = FSKWriter(sample_rate, baud, f_low, f_high, amplitude)
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writer.leader(leader_seconds)
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writer.bytes(bytes([PREAMBLE_BYTE]) * preamble_bytes)
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sequence = 0
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for start in range(0, len(data), block_size):
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payload = data[start:start + block_size]
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writer.bytes(make_block(sequence, payload))
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sequence = (sequence + 1) & 0xFFFF
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writer.bytes(make_eof_block(sequence))
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with wave.open(str(output_path), "wb") as wav:
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wav.setnchannels(1)
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wav.setsampwidth(2)
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wav.setframerate(sample_rate)
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wav.writeframes(writer.samples)
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duration = len(writer.samples) / 2 / sample_rate
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print(f"Input: {input_path}")
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print(f"Output: {output_path}")
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print(f"Input bytes: {len(data)}")
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print(f"Bit rate: {baud} bit/s")
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print(f"Tones: {f_low:g} Hz / {f_high:g} Hz")
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print(f"Sample rate: {sample_rate} Hz")
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print(f"Half-bit: {writer.samples_per_half_bit} samples")
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print(f"Block size: {block_size} bytes")
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print(f"WAV duration: {duration:.2f} s")
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def main() -> None:
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parser = argparse.ArgumentParser(description="Encode a binary file as Manchester two-tone FSK WAV.")
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parser.add_argument("input", type=Path, help="binary input file")
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parser.add_argument("output", type=Path, nargs="?", help="output WAV; default: INPUT.wav")
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parser.add_argument("--baud", type=int, default=600)
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parser.add_argument("--low", type=float, default=2000.0, help="low tone in Hz")
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parser.add_argument("--high", type=float, default=4000.0, help="high tone in Hz")
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parser.add_argument("--sample-rate", type=int, default=48000)
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parser.add_argument("--leader", type=float, default=1.0, help="leader seconds")
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parser.add_argument("--preamble", type=int, default=64, help="number of 0x55 preamble bytes")
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parser.add_argument("--block-size", type=int, default=64)
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parser.add_argument("--amplitude", type=float, default=0.75)
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args = parser.parse_args()
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output = args.output or args.input.with_name(args.input.name + ".wav")
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encode(
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args.input,
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output,
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sample_rate=args.sample_rate,
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baud=args.baud,
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f_low=args.low,
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f_high=args.high,
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leader_seconds=args.leader,
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preamble_bytes=args.preamble,
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block_size=args.block_size,
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amplitude=args.amplitude,
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)
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if __name__ == "__main__":
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main()
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@@ -0,0 +1,50 @@
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.include "bios.inc"
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.area TAPELOAD (ABS)
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.org TAPE_LOADER_ROM_ADDRESS
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COMP_PORT = 0x18
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WORK_BASE = 0x0B000
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LOAD_START = 0x08000
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LOAD_LIMIT_HI = 0x0B0
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STACK_TOP = 0x0BFFF
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OLD_SP = WORK_BASE+0x00
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start:
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ld (OLD_SP), sp
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ld sp, #STACK_TOP
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di
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poll_loop:
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; Read from the hardware port COMP_PORT
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in a, (COMP_PORT)
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out (COMP_PORT), a
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; Save the raw port status in register B
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ld b, a
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; Print a carriage return '\r' (ASCII 0x0D)
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ld a, #0x0D
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call BIOS_PUTC
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; Restore the port status and isolate the relevant bit
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; (Assuming bit 0 determines 0 or 1; adjust 'and' mask if it is a different bit)
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ld a, b
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and #0x01
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; Convert the binary 0 or 1 into ASCII '0' (0x30) or '1' (0x31)
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add a, #0x30
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; Print the '0' or '1' character
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call BIOS_PUTC
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; Infinite loop: poll continuously
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jr poll_loop
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ld sp, (OLD_SP)
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ei
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ret
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