263 lines
7.6 KiB
Plaintext
263 lines
7.6 KiB
Plaintext
/*
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* Zynq 7000 PL Interface over Remote-port.
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*
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* Copyright (c) 2016, Xilinx Inc
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the <organization> nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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&slcr {
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/* In QEMU, the SLCR exports GPIOS (e.g the FPGA Resets). */
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#gpio-cells = <1>;
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gpio-controller;
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};
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/* Append stuff to the PS nodes. */
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/ {
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/* This version of the AMBA PL describes the PS/PL interface
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* and not the devices that are available on the PL side.
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*
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* This is what QEMU will use to instantiate the RemotePort
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* connections allowing for cosimulation.
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*/
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amba_pl {
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cosim_rp_0: cosim@0 {
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compatible = "remote-port";
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sync = <1>;
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chrdev-id = "pl-rp";
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};
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m_axi_gp0: rp_m_axi_gp0@40000000 {
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compatible = "remote-port-memory-master";
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remote-ports = < &cosim_rp_0 7 >;
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reg = < 0x40000000 0x40000000 >;
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};
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m_axi_gp1: rp_m_axi_gp1@80000000 {
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compatible = "remote-port-memory-master";
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remote-ports = < &cosim_rp_0 8 >;
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reg = < 0x80000000 0x40000000 >;
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};
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s_axi_gp0: rp_s_axi_gp0@0 {
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compatible = "remote-port-memory-slave";
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remote-ports = < &cosim_rp_0 0 >;
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};
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s_axi_gp1: rp_s_axi_gp1@0 {
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compatible = "remote-port-memory-slave";
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remote-ports = < &cosim_rp_0 1 >;
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};
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afi_0: rp_afi0@0 {
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compatible = "remote-port-memory-slave";
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remote-ports = < &cosim_rp_0 2 >;
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};
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afi_1: rp_afi1@0 {
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compatible = "remote-port-memory-slave";
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remote-ports = < &cosim_rp_0 3 >;
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};
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afi_2: rp_afi2@0 {
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compatible = "remote-port-memory-slave";
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remote-ports = < &cosim_rp_0 4 >;
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};
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afi_3: rp_afi3@0 {
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compatible = "remote-port-memory-slave";
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remote-ports = < &cosim_rp_0 5 >;
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};
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acp: rp_acp0@0 {
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compatible = "remote-port-memory-slave";
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remote-ports = < &cosim_rp_0 6 >;
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};
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wires_in: rp_wires_in@0 {
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compatible = "remote-port-gpio";
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remote-ports = < &cosim_rp_0 9 >;
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num-gpios = < 16 >;
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/* QEMU has a bug in the interrupts-extended parsing,
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* so we need to use interrupt-parent for the moment.
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*/
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interrupt-parent = < &intc >;
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interrupts = <
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0x0 29 0x4
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0x0 30 0x4
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0x0 31 0x4
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0x0 32 0x4
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0x0 33 0x4
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0x0 34 0x4
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0x0 35 0x4
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0x0 36 0x4
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0x0 52 0x4
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0x0 53 0x4
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0x0 54 0x4
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0x0 55 0x4
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0x0 56 0x4
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0x0 57 0x4
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0x0 58 0x4
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0x0 59 0x4
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>;
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};
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wires_out: rp_wires_out@0 {
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compatible = "remote-port-gpio";
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remote-ports = < &cosim_rp_0 10 >;
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num-gpios = <17>;
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gpios = <
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/* 17 FPGA_OUT_RESETS. */
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&slcr 2 &slcr 3 &slcr 4 &slcr 5
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&slcr 6 &slcr 7 &slcr 8 &slcr 9
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&slcr 10 &slcr 11 &slcr 12 &slcr 13
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&slcr 14 &slcr 15 &slcr 16 &slcr 17
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&slcr 18
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>;
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};
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rp_cosim_intr_pstopl: rp_cosim_intr_pstopl@0 {
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#interrupt-cells = <3>;
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interrupt-controller;
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compatible = "remote-port-gpio";
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remote-ports = <&cosim_rp_0 11>;
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/* There are only 28 connections but due to the offset we need
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* a higher number here.
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*/
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num-gpios = <96>;
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cell-offset-irq-num = <1>;
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};
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/* This area can be used for implentation specific emulation*/
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rp_cosim_reserved: rp_cosim_reserved@0{
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compatible = "remote-port-memory-master";
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remote-ports = <&cosim_rp_0 12>;
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reg = <0xFE000000 0x100000>;
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};
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};
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};
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&can1 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 0 4>, <0 0 0 &intc 0 51 4>;
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};
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&uart1 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 1 4>, <0 0 0 &intc 0 50 4>;
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};
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&spi1 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 2 4>, <0 0 0 &intc 0 49 4>;
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};
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&i2c1 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 3 4>, <0 0 0 &intc 0 48 4>;
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};
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&sdhci1 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 4 4>, <0 0 0 &intc 0 47 4>;
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};
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&gem1 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 6 4>, <0 0 0 &intc 0 45 4>;
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};
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&usb1 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 7 4>, <0 0 0 &intc 0 44 4>;
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};
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&can0 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 8 4>, <0 0 0 &intc 0 28 4>;
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};
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&spi0 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 10 4>, <0 0 0 &intc 0 26 4>;
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};
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&i2c0 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 11 4>, <0 0 0 &intc 0 25 4>;
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};
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&sdhci0 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 12 4>, <0 0 0 &intc 0 24 4>;
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};
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&gem0 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 14 4>, <0 0 0 &intc 0 22 4>;
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};
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&usb0 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 15 4>, <0 0 0 &intc 0 21 4>;
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};
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&gpio0 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 16 4>, <0 0 0 &intc 0 20 4>;
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};
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&qspi {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 18 4>, <0 0 0 &intc 0 19 4>;
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};
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&smcc {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 19 4>, <0 0 0 &intc 0 18 4>;
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};
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&dmac_s {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 &rp_cosim_intr_pstopl 0 28 4>, <0 0 0 &intc 0 13 4>,
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<0 0 0 &rp_cosim_intr_pstopl 0 20 4>, <0 0 0 &intc 0 14 4>,
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<0 0 0 &rp_cosim_intr_pstopl 0 21 4>, <0 0 0 &intc 0 15 4>,
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<0 0 0 &rp_cosim_intr_pstopl 0 22 4>, <0 0 0 &intc 0 16 4>,
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<0 0 0 &rp_cosim_intr_pstopl 0 23 4>, <0 0 0 &intc 0 17 4>,
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<0 0 0 &rp_cosim_intr_pstopl 0 24 4>, <0 0 0 &intc 0 40 4>,
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<0 0 0 &rp_cosim_intr_pstopl 0 25 4>, <0 0 0 &intc 0 41 4>,
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<0 0 0 &rp_cosim_intr_pstopl 0 26 4>, <0 0 0 &intc 0 42 4>,
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<0 0 0 &rp_cosim_intr_pstopl 0 27 4>, <0 0 0 &intc 0 43 4>;
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}; |