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        <spirit:name>xilinx_externalfiles</spirit:name>
        <spirit:displayName>External Files</spirit:displayName>
        <spirit:envIdentifier>:vivado.xilinx.com:external.files</spirit:envIdentifier>
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          <spirit:localName>xilinx_externalfiles_view_fileset</spirit:localName>
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          <spirit:parameter>
            <spirit:name>GENtimestamp</spirit:name>
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            <spirit:name>outputProductCRC</spirit:name>
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        </spirit:parameters>
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    <spirit:ports>
      <spirit:port>
        <spirit:name>slowest_sync_clk</spirit:name>
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      <spirit:port>
        <spirit:name>ext_reset_in</spirit:name>
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            <spirit:wireTypeDef>
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        <spirit:name>aux_reset_in</spirit:name>
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            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
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            <spirit:defaultValue spirit:format="long">1</spirit:defaultValue>
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      <spirit:port>
        <spirit:name>mb_debug_sys_rst</spirit:name>
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            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
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            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
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        <spirit:name>mb_reset</spirit:name>
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            <spirit:wireTypeDef>
              <spirit:typeName>std_logic</spirit:typeName>
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        <spirit:name>bus_struct_reset</spirit:name>
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          <spirit:direction>out</spirit:direction>
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            <spirit:left spirit:format="long">0</spirit:left>
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        <spirit:name>peripheral_reset</spirit:name>
        <spirit:wire>
          <spirit:direction>out</spirit:direction>
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            <spirit:left spirit:format="long">0</spirit:left>
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            <spirit:wireTypeDef>
              <spirit:typeName>std_logic_vector</spirit:typeName>
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            <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
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      <spirit:port>
        <spirit:name>interconnect_aresetn</spirit:name>
        <spirit:wire>
          <spirit:direction>out</spirit:direction>
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            <spirit:left spirit:format="long">0</spirit:left>
            <spirit:right spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.C_NUM_INTERCONNECT_ARESETN&apos;)) - 1)">0</spirit:right>
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            <spirit:wireTypeDef>
              <spirit:typeName>std_logic_vector</spirit:typeName>
              <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
              <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
            </spirit:wireTypeDef>
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          <spirit:driver>
            <spirit:defaultValue spirit:format="long">1</spirit:defaultValue>
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        </spirit:wire>
      </spirit:port>
      <spirit:port>
        <spirit:name>peripheral_aresetn</spirit:name>
        <spirit:wire>
          <spirit:direction>out</spirit:direction>
          <spirit:vector>
            <spirit:left spirit:format="long">0</spirit:left>
            <spirit:right spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.C_NUM_PERP_ARESETN&apos;)) - 1)">0</spirit:right>
          </spirit:vector>
          <spirit:wireTypeDefs>
            <spirit:wireTypeDef>
              <spirit:typeName>std_logic_vector</spirit:typeName>
              <spirit:viewNameRef>xilinx_vhdlsynthesis</spirit:viewNameRef>
              <spirit:viewNameRef>xilinx_vhdlbehavioralsimulation</spirit:viewNameRef>
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          <spirit:driver>
            <spirit:defaultValue spirit:format="long">1</spirit:defaultValue>
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    </spirit:ports>
    <spirit:modelParameters>
      <spirit:modelParameter xsi:type="spirit:nameValueTypeType" spirit:dataType="string">
        <spirit:name>C_FAMILY</spirit:name>
        <spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_FAMILY">zynq</spirit:value>
      </spirit:modelParameter>
      <spirit:modelParameter spirit:dataType="integer">
        <spirit:name>C_EXT_RST_WIDTH</spirit:name>
        <spirit:displayName>Ext Rst Width</spirit:displayName>
        <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_EXT_RST_WIDTH" spirit:minimum="1" spirit:maximum="16" spirit:rangeType="long">4</spirit:value>
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      <spirit:modelParameter spirit:dataType="integer">
        <spirit:name>C_AUX_RST_WIDTH</spirit:name>
        <spirit:displayName>Aux Rst Width</spirit:displayName>
        <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_AUX_RST_WIDTH" spirit:minimum="1" spirit:maximum="32" spirit:rangeType="long">4</spirit:value>
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      <spirit:modelParameter spirit:dataType="std_logic">
        <spirit:name>C_EXT_RESET_HIGH</spirit:name>
        <spirit:displayName>Ext Reset High</spirit:displayName>
        <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_EXT_RESET_HIGH">0</spirit:value>
      </spirit:modelParameter>
      <spirit:modelParameter spirit:dataType="std_logic">
        <spirit:name>C_AUX_RESET_HIGH</spirit:name>
        <spirit:displayName>Aux Reset High</spirit:displayName>
        <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_AUX_RESET_HIGH" spirit:minimum="0" spirit:maximum="1" spirit:rangeType="long">0</spirit:value>
      </spirit:modelParameter>
      <spirit:modelParameter spirit:dataType="integer">
        <spirit:name>C_NUM_BUS_RST</spirit:name>
        <spirit:displayName>No. of Bus Reset (Active High)</spirit:displayName>
        <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_NUM_BUS_RST" spirit:minimum="1" spirit:maximum="32" spirit:rangeType="long">1</spirit:value>
      </spirit:modelParameter>
      <spirit:modelParameter spirit:dataType="integer">
        <spirit:name>C_NUM_PERP_RST</spirit:name>
        <spirit:displayName>No. of Peripheral Reset (Active High)</spirit:displayName>
        <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_NUM_PERP_RST" spirit:minimum="1" spirit:maximum="32" spirit:rangeType="long">1</spirit:value>
      </spirit:modelParameter>
      <spirit:modelParameter spirit:dataType="integer">
        <spirit:name>C_NUM_INTERCONNECT_ARESETN</spirit:name>
        <spirit:displayName>No. of Interconnect Reset (Active Low)</spirit:displayName>
        <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_NUM_INTERCONNECT_ARESETN" spirit:minimum="1" spirit:maximum="32" spirit:rangeType="long">1</spirit:value>
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      <spirit:modelParameter spirit:dataType="integer">
        <spirit:name>C_NUM_PERP_ARESETN</spirit:name>
        <spirit:displayName>No. of Peripheral Reset (Active Low)</spirit:displayName>
        <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_NUM_PERP_ARESETN" spirit:minimum="1" spirit:maximum="31" spirit:rangeType="long">1</spirit:value>
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      <spirit:name>choice_list_ac75ef1e</spirit:name>
      <spirit:enumeration>Custom</spirit:enumeration>
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      <spirit:file>
        <spirit:name>rst_gen.veo</spirit:name>
        <spirit:userFileType>verilogTemplate</spirit:userFileType>
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    </spirit:fileSet>
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      <spirit:name>xilinx_vhdlsynthesis_xilinx_com_ip_lib_cdc_1_0__ref_view_fileset</spirit:name>
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        <spirit:name>hdl/lib_cdc_v1_0_rfs.vhd</spirit:name>
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        <xilinx:subCoreRef>
          <xilinx:componentRef xilinx:vendor="xilinx.com" xilinx:library="ip" xilinx:name="lib_cdc" xilinx:version="1.0" xilinx:isGenerated="true" xilinx:checksum="726cb4eb">
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    </spirit:fileSet>
    <spirit:fileSet>
      <spirit:name>xilinx_vhdlsynthesis_view_fileset</spirit:name>
      <spirit:file>
        <spirit:name>hdl/proc_sys_reset_v5_0_vh_rfs.vhd</spirit:name>
        <spirit:fileType>vhdlSource</spirit:fileType>
        <spirit:logicalName>proc_sys_reset_v5_0_13</spirit:logicalName>
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      <spirit:file>
        <spirit:name>rst_gen.xdc</spirit:name>
        <spirit:userFileType>xdc</spirit:userFileType>
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    <spirit:fileSet>
      <spirit:name>xilinx_synthesisconstraints_view_fileset</spirit:name>
      <spirit:file>
        <spirit:name>rst_gen_ooc.xdc</spirit:name>
        <spirit:userFileType>xdc</spirit:userFileType>
        <spirit:userFileType>USED_IN_implementation</spirit:userFileType>
        <spirit:userFileType>USED_IN_out_of_context</spirit:userFileType>
        <spirit:userFileType>USED_IN_synthesis</spirit:userFileType>
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    </spirit:fileSet>
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      <spirit:name>xilinx_vhdlsynthesiswrapper_view_fileset</spirit:name>
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        <spirit:name>synth/rst_gen.vhd</spirit:name>
        <spirit:fileType>vhdlSource</spirit:fileType>
        <spirit:logicalName>xil_defaultlib</spirit:logicalName>
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      <spirit:name>xilinx_vhdlbehavioralsimulation_xilinx_com_ip_lib_cdc_1_0__ref_view_fileset</spirit:name>
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        <spirit:name>hdl/lib_cdc_v1_0_rfs.vhd</spirit:name>
        <spirit:fileType>vhdlSource</spirit:fileType>
        <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
        <spirit:logicalName>lib_cdc_v1_0_2</spirit:logicalName>
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        <xilinx:subCoreRef>
          <xilinx:componentRef xilinx:vendor="xilinx.com" xilinx:library="ip" xilinx:name="lib_cdc" xilinx:version="1.0" xilinx:isGenerated="true" xilinx:checksum="726cb4eb">
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        <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
        <spirit:logicalName>proc_sys_reset_v5_0_13</spirit:logicalName>
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    <spirit:fileSet>
      <spirit:name>xilinx_vhdlsimulationwrapper_view_fileset</spirit:name>
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        <spirit:name>sim/rst_gen.vhd</spirit:name>
        <spirit:fileType>vhdlSource</spirit:fileType>
        <spirit:logicalName>xil_defaultlib</spirit:logicalName>
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    <spirit:fileSet>
      <spirit:name>xilinx_implementation_view_fileset</spirit:name>
      <spirit:file>
        <spirit:name>rst_gen_board.xdc</spirit:name>
        <spirit:userFileType>xdc</spirit:userFileType>
        <spirit:userFileType>USED_IN_board</spirit:userFileType>
        <spirit:userFileType>USED_IN_implementation</spirit:userFileType>
        <spirit:userFileType>USED_IN_synthesis</spirit:userFileType>
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    </spirit:fileSet>
    <spirit:fileSet>
      <spirit:name>xilinx_versioninformation_view_fileset</spirit:name>
      <spirit:file>
        <spirit:name>doc/proc_sys_reset_v5_0_changelog.txt</spirit:name>
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        <spirit:name>rst_gen.dcp</spirit:name>
        <spirit:userFileType>dcp</spirit:userFileType>
        <spirit:userFileType>USED_IN_implementation</spirit:userFileType>
        <spirit:userFileType>USED_IN_synthesis</spirit:userFileType>
        <spirit:logicalName>xil_defaultlib</spirit:logicalName>
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      <spirit:file>
        <spirit:name>rst_gen_stub.v</spirit:name>
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        <spirit:logicalName>xil_defaultlib</spirit:logicalName>
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        <spirit:logicalName>xil_defaultlib</spirit:logicalName>
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        <spirit:name>rst_gen_sim_netlist.vhdl</spirit:name>
        <spirit:fileType>vhdlSource</spirit:fileType>
        <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
        <spirit:userFileType>USED_IN_single_language</spirit:userFileType>
        <spirit:logicalName>xil_defaultlib</spirit:logicalName>
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        <spirit:name>rst_gen_sim_netlist.v</spirit:name>
        <spirit:fileType>verilogSource</spirit:fileType>
        <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
        <spirit:userFileType>USED_IN_single_language</spirit:userFileType>
        <spirit:logicalName>xil_defaultlib</spirit:logicalName>
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      <spirit:name>C_NUM_PERP_ARESETN</spirit:name>
      <spirit:displayName>No. of Peripheral Reset (Active Low)</spirit:displayName>
      <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_NUM_PERP_ARESETN" spirit:order="1800" spirit:minimum="1" spirit:maximum="16" spirit:rangeType="long">1</spirit:value>
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    <spirit:parameter>
      <spirit:name>C_NUM_INTERCONNECT_ARESETN</spirit:name>
      <spirit:displayName>No. of Interconnect Reset (Active Low)</spirit:displayName>
      <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_NUM_INTERCONNECT_ARESETN" spirit:order="1700" spirit:minimum="1" spirit:maximum="8" spirit:rangeType="long">1</spirit:value>
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    <spirit:parameter>
      <spirit:name>C_NUM_PERP_RST</spirit:name>
      <spirit:displayName>No. of Peripheral Reset (Active High)</spirit:displayName>
      <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_NUM_PERP_RST" spirit:order="1600" spirit:minimum="1" spirit:maximum="16" spirit:rangeType="long">1</spirit:value>
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    <spirit:parameter>
      <spirit:name>C_NUM_BUS_RST</spirit:name>
      <spirit:displayName>No. of Bus Reset (Active High)</spirit:displayName>
      <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_NUM_BUS_RST" spirit:order="1500" spirit:minimum="1" spirit:maximum="8" spirit:rangeType="long">1</spirit:value>
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    <spirit:parameter>
      <spirit:name>C_AUX_RESET_HIGH</spirit:name>
      <spirit:displayName>Aux Reset High</spirit:displayName>
      <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_AUX_RESET_HIGH" spirit:order="1400" spirit:minimum="0" spirit:maximum="1" spirit:rangeType="long">0</spirit:value>
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    <spirit:parameter>
      <spirit:name>C_EXT_RESET_HIGH</spirit:name>
      <spirit:displayName>Ext Reset High</spirit:displayName>
      <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_EXT_RESET_HIGH" spirit:order="1300" spirit:minimum="0" spirit:maximum="1" spirit:rangeType="long">0</spirit:value>
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    <spirit:parameter>
      <spirit:name>C_AUX_RST_WIDTH</spirit:name>
      <spirit:displayName>Aux Rst Width</spirit:displayName>
      <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_AUX_RST_WIDTH" spirit:order="1200" spirit:minimum="1" spirit:maximum="16" spirit:rangeType="long">4</spirit:value>
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    <spirit:parameter>
      <spirit:name>C_EXT_RST_WIDTH</spirit:name>
      <spirit:displayName>Ext Rst Width</spirit:displayName>
      <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_EXT_RST_WIDTH" spirit:order="1100" spirit:minimum="1" spirit:maximum="16" spirit:rangeType="long">4</spirit:value>
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    <spirit:parameter>
      <spirit:name>Component_Name</spirit:name>
      <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="1">rst_gen</spirit:value>
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    <spirit:parameter>
      <spirit:name>USE_BOARD_FLOW</spirit:name>
      <spirit:displayName>Generate Board based IO Constraints</spirit:displayName>
      <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.USE_BOARD_FLOW" spirit:order="2">false</spirit:value>
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    <spirit:parameter>
      <spirit:name>RESET_BOARD_INTERFACE</spirit:name>
      <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.RESET_BOARD_INTERFACE" spirit:choiceRef="choice_list_ac75ef1e" spirit:order="3">Custom</spirit:value>
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  <spirit:vendorExtensions>
    <xilinx:coreExtensions>
      <xilinx:displayName>Processor System Reset</xilinx:displayName>
      <xilinx:coreRevision>13</xilinx:coreRevision>
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        <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_AUX_RESET_HIGH" xilinx:valueSource="user"/>
        <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_EXT_RESET_HIGH" xilinx:valueSource="user"/>
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      <xilinx:checksum xilinx:scope="ports" xilinx:value="f2ac9635"/>
      <xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="404de108"/>
      <xilinx:checksum xilinx:scope="parameters" xilinx:value="8319b917"/>
    </xilinx:packagingInfo>
  </spirit:vendorExtensions>
</spirit:component>
