232 lines
7.4 KiB
C
232 lines
7.4 KiB
C
// main.c
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#include <stdio.h>
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#include <string.h>
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#include "pico/stdlib.h"
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#include "hardware/clocks.h"
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#include "hardware/dma.h"
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#include "hardware/irq.h"
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#include "hardware/pio.h"
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#include "video_dma.pio.h"
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// ---------------------------
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// User-adjustable pins
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// ---------------------------
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#define VIDEO_PIO pio0
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#define DATA_SM 0
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#define SYNC_SM 1
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#define DATA_PIN 2 // pixel / luma bit pin
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#define SYNC_PIN 3 // sync pin
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// ---------------------------
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// Video format
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// ---------------------------
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#define VIDEO_WIDTH 768
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#define VIDEO_HEIGHT 576
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#define WORDS_PER_LINE (VIDEO_WIDTH / 32)
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#define LINES_PER_FIELD (VIDEO_HEIGHT / 2)
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#define SYNC_INTERVAL_S 0.000002f // 2 us per sync-SM instruction
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#define ACTIVE_VIDEO_S 0.000052f // 52 us active video per line
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// Match the .pio program's published constant.
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// pioasm will emit CLOCKS_PER_BIT in the generated header.
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#ifndef CLOCKS_PER_BIT
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#define CLOCKS_PER_BIT 6
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#endif
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// ---------------------------
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// Framebuffer
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// One bit per pixel, 32 pixels per word
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// ---------------------------
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static uint32_t framebuffer[VIDEO_HEIGHT][WORDS_PER_LINE];
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// Field/line tracking for line-based DMA.
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// This is intentionally kept in software to match the sync SM's 288 active
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// lines per field.
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static volatile bool even_field = true;
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static volatile uint line_in_field = 0;
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// DMA channel that feeds the PIO TX FIFO
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static int video_dma_chan;
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// ---------------------------
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// Optional test pattern
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// Replace this with your own drawing code.
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// ---------------------------
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#define BORDER 40
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static void fill_test_pattern(void) {
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memset(framebuffer, 0x00, sizeof(framebuffer));
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for (uint y = 0; y < VIDEO_HEIGHT; ++y) {
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for (uint x = 0; x < VIDEO_WIDTH; ++x) {
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bool on = false;
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// Simple visible pattern:
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// border + checker
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if (x < BORDER || x >= VIDEO_WIDTH - BORDER || y < BORDER || y >= VIDEO_HEIGHT - BORDER) {
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on = true;
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} else if (((x >> 4) ^ (y >> 4)) & 1) {
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on = true;
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}
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if (on) {
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uint word = x >> 5;
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uint bit = 31 - (x & 31); // MSB-first
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framebuffer[y][word] |= (1u << bit);
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}
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}
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}
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}
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// ---------------------------
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// PIO init helpers
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// ---------------------------
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static void init_cvdata_program(PIO pio, uint sm, uint offset, float clkdiv, uint data_pin) {
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pio_sm_config c = cvdata_program_get_default_config(offset);
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sm_config_set_set_pins(&c, data_pin, 1);
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sm_config_set_out_pins(&c, data_pin, 1);
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sm_config_set_clkdiv(&c, clkdiv);
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// Shift left, autopull every 32 bits.
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// If the image is mirrored, change this to shift-right and/or change bit packing.
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sm_config_set_out_shift(&c, false, true, 32);
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pio_gpio_init(pio, data_pin);
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pio_sm_set_consecutive_pindirs(pio, sm, data_pin, 1, true);
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pio_sm_init(pio, sm, offset, &c);
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// Preload X = VIDEO_WIDTH - 1
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pio_sm_put_blocking(pio, sm, VIDEO_WIDTH - 1);
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pio_sm_exec(pio, sm, pio_encode_pull(false, false));
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pio_sm_exec(pio, sm, pio_encode_mov(pio_x, pio_osr));
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pio_sm_exec(pio, sm, pio_encode_out(pio_null, 32));
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}
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static void init_cvsync_program(PIO pio, uint sm, uint offset, float clkdiv, uint sync_pin) {
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pio_sm_config c = cvsync_program_get_default_config(offset);
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sm_config_set_sideset_pins(&c, sync_pin);
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sm_config_set_clkdiv(&c, clkdiv);
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pio_gpio_init(pio, sync_pin);
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pio_sm_set_consecutive_pindirs(pio, sm, sync_pin, 1, true);
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pio_sm_init(pio, sm, offset, &c);
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// Preload OSR = lines_per_field - 1
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pio_sm_put_blocking(pio, sm, LINES_PER_FIELD - 1);
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pio_sm_exec(pio, sm, pio_encode_pull(false, false));
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// Start with Y = 0, meaning "even field" in this program.
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pio_sm_exec(pio, sm, pio_encode_set(pio_y, 0));
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}
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// ---------------------------
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// DMA setup
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// ---------------------------
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static void init_video_dma(PIO pio, uint data_sm) {
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video_dma_chan = dma_claim_unused_channel(true);
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dma_channel_config cfg = dma_channel_get_default_config(video_dma_chan);
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channel_config_set_transfer_data_size(&cfg, DMA_SIZE_32);
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channel_config_set_read_increment(&cfg, true);
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channel_config_set_write_increment(&cfg, false);
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// Pace the DMA from the data SM TX FIFO DREQ
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channel_config_set_dreq(&cfg, pio_get_dreq(pio, data_sm, true));
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dma_channel_configure(
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video_dma_chan,
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&cfg,
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&pio->txf[data_sm], // write address
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NULL, // read address set per line
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0, // transfer count set per line
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false // don't start yet
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);
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}
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// ---------------------------
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// Start DMA for one scanline
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// ---------------------------
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static inline void start_dma_for_current_line(void) {
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uint src_line = even_field ? (line_in_field * 2u) : (line_in_field * 2u + 1u);
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dma_channel_set_read_addr(video_dma_chan, framebuffer[src_line], false);
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dma_channel_set_trans_count(video_dma_chan, WORDS_PER_LINE, true);
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line_in_field++;
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if (line_in_field >= LINES_PER_FIELD) {
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line_in_field = 0;
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even_field = !even_field;
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}
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}
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// ---------------------------
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// PIO IRQ handler:
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// The sync SM pushes one token into its RX FIFO during each line's back porch.
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// As soon as the previous line DMA has finished, consume one token and arm the
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// next scanline so the data FIFO is primed before visible pixels start.
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// ---------------------------
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static void pio0_irq0_handler(void) {
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if (!pio_sm_is_rx_fifo_empty(VIDEO_PIO, SYNC_SM) && !dma_channel_is_busy(video_dma_chan)) {
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(void)pio_sm_get(VIDEO_PIO, SYNC_SM);
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start_dma_for_current_line();
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}
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}
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// ---------------------------
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// Video start
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// ---------------------------
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static void video_init(void) {
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if ((VIDEO_WIDTH % 32) != 0) {
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panic("VIDEO_WIDTH must be a multiple of 32");
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}
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uint sync_offset = pio_add_program(VIDEO_PIO, &cvsync_program);
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uint data_offset = pio_add_program(VIDEO_PIO, &cvdata_program);
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// Same timing idea as the original repo:
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// sync SM: 1 instruction every 2 us
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// data SM: enough PIO cycles to emit VIDEO_WIDTH bits in 52 us
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float sys_hz = (float)clock_get_hz(clk_sys);
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float data_clkdiv = (sys_hz / ((float)VIDEO_WIDTH / ACTIVE_VIDEO_S)) / (float)CLOCKS_PER_BIT;
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float sync_clkdiv = sys_hz * SYNC_INTERVAL_S;
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init_cvdata_program(VIDEO_PIO, DATA_SM, data_offset, data_clkdiv, DATA_PIN);
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init_cvsync_program(VIDEO_PIO, SYNC_SM, sync_offset, sync_clkdiv, SYNC_PIN);
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init_video_dma(VIDEO_PIO, DATA_SM);
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// Route sync-SM RX FIFO notifications to CPU IRQ 0.
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pio_set_irq0_source_enabled(VIDEO_PIO, pis_sm1_rx_fifo_not_empty, true);
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irq_set_exclusive_handler(PIO0_IRQ_0, pio0_irq0_handler);
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irq_set_enabled(PIO0_IRQ_0, true);
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// Start with the first line of the even field
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even_field = true;
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line_in_field = 0;
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// Prime the FIFO so the very first active line does not depend on IRQ latency.
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start_dma_for_current_line();
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pio_sm_set_enabled(VIDEO_PIO, DATA_SM, true);
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pio_sm_set_enabled(VIDEO_PIO, SYNC_SM, true);
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}
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int main(void) {
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stdio_init_all();
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fill_test_pattern(); // Replace with your own framebuffer writer
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video_init();
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while (true) {
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// Your application code goes here.
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// Some other code can freely draw into framebuffer[].
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tight_loop_contents();
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}
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}
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