`timescale 1ns/1ps

module top_generic #(
    parameter sim = 0
)(
    input wire aclk,
    input wire aresetn,

    output wire led_green,
    output wire led_red,

    output wire[5:0] r2r,
    output wire[7:0] LED
);
    `include "conv.vh"

    // Clocking
    wire clk_100;
    wire clk_15;
    assign clk_100 = aclk;
    clk_gen clocking(
        .clk_in(clk_100),
        .clk_out_15(clk_15)
    );

    wire [31:0] GPIO_A;
    wire [31:0] GPIO_B;
    wire [31:0] GPIO_C;
    wire [31:0] GPIO_D;

    wire test;

    mcu #(
        .memfile("../sw/sweep/sweep.hex"),
        .sim(sim)
    ) mcu (
        .i_clk(clk_15),
        .i_rst(!aresetn),
        .i_GPI_A(GPIO_A),
        .i_GPI_B(GPIO_B),
        .i_GPI_C(GPIO_C),
        .i_GPI_D(GPIO_D),
        .o_GPO_A(GPIO_A),
        .o_GPO_B(GPIO_B),
        .o_GPO_C(GPIO_C),
        .o_GPO_D(GPIO_D),
        .o_test(test)
    );


    wire [15:0] sin_q15;
    wire clk_en;
    nco_q15 #(
        .CLK_HZ(15_000_000),
        .FS_HZ(80_000)
    ) nco (
        .clk    (clk_15),
        .rst_n  (aresetn),
        .freq_hz(GPIO_A),
        .sin_q15(sin_q15),
        .cos_q15(),
        .clk_en (clk_en)
    );

    reg [5:0] dac_code;
    always @(posedge clk_15) begin
        dac_code <= q15_to_uq16(sin_q15) >> 10;
    end
    assign r2r = dac_code;

    assign LED = GPIO_B[7:0];
    assign led_green = GPIO_C[0];
    assign led_red = test;
endmodule