diff --git a/CON/timing.sdc b/CON/timing.sdc
index 469c6f7..3cdddf5 100644
--- a/CON/timing.sdc
+++ b/CON/timing.sdc
@@ -2,5 +2,6 @@
//All rights reserved.
//File Title: Timing Constraints file
//Tool Version: V1.9.12
-//Created Time: 2025-10-01 13:43:45
+//Created Time: 2025-10-01 16:50:37
create_clock -name CLK_IN -period 37.037 -waveform {0 18.518} [get_ports {clk}]
+create_clock -name CLK_120 -period 8.333 -waveform {0 4.167} [get_nets {clk_120}]
diff --git a/HW/toplevel.v b/HW/toplevel.v
index 6bed95e..66b605b 100644
--- a/HW/toplevel.v
+++ b/HW/toplevel.v
@@ -7,8 +7,15 @@ module toplevel(
output wire led
);
reg led_v;
+ wire clk_120;
- always @(posedge clk or negedge reset_n) begin
+ gw_pllvr m_pll(
+ .clkout(clk_120),
+ .reset(!reset_n),
+ .clkin(clk)
+ );
+
+ always @(posedge clk_120 or negedge reset_n) begin
if (!reset_n) begin
led_v <= 1'b0;
end else begin
diff --git a/IP/ge_pllvr/gw_pllvr.ipc b/IP/gw_pllvr/gw_pllvr.ipc
similarity index 100%
rename from IP/ge_pllvr/gw_pllvr.ipc
rename to IP/gw_pllvr/gw_pllvr.ipc
diff --git a/IP/ge_pllvr/gw_pllvr.mod b/IP/gw_pllvr/gw_pllvr.mod
similarity index 100%
rename from IP/ge_pllvr/gw_pllvr.mod
rename to IP/gw_pllvr/gw_pllvr.mod
diff --git a/IP/ge_pllvr/gw_pllvr.v b/IP/gw_pllvr/gw_pllvr.v
similarity index 100%
rename from IP/ge_pllvr/gw_pllvr.v
rename to IP/gw_pllvr/gw_pllvr.v
diff --git a/IP/ge_pllvr/gw_pllvr_tmp.v b/IP/gw_pllvr/gw_pllvr_tmp.v
similarity index 100%
rename from IP/ge_pllvr/gw_pllvr_tmp.v
rename to IP/gw_pllvr/gw_pllvr_tmp.v
diff --git a/SIM/toplevel_tb.v b/SIM/toplevel_tb.v
index f816f53..276dd40 100644
--- a/SIM/toplevel_tb.v
+++ b/SIM/toplevel_tb.v
@@ -23,20 +23,37 @@ module toplevel_tb;
#50 reset_n <= 1'b1;
- #70 button <= 1'b1;
+ // Wait for clk 120 starts
+ @(posedge toplevel_tb.m_toplevel.clk_120);
+
+ #78 button <= 1'b1;
#185 button <= 1'b0;
- #200
+ #400
$finish;
end
always #37 clk = ~clk;
-`ifdef TIMING_SIM
+ // Simulation stuff
+ // PLL quickstart
+ `ifndef TIMING_SIM
+ reg tb_pll_clk = 1'b0;
+ always #4.15 tb_pll_clk = ~tb_pll_clk;
+ initial begin
+ @(posedge reset_n);
+ repeat (8) @(posedge clk); // give the model time to measure CLKIN
+ force toplevel_tb.m_toplevel.m_pll.pllvr_inst.LOCK = 1'b1;
+ force toplevel_tb.m_toplevel.m_pll.pllvr_inst.CLKOUT = tb_pll_clk;
+ force toplevel_tb.m_toplevel.m_pll.pllvr_inst.CLKOUTP = tb_pll_clk;
+ end
+ `endif
+ // SDF annotation
+ `ifdef TIMING_SIM
initial begin
$sdf_annotate("impl/pnr/modem.sdf", m_toplevel, , , "MAXIMUM");
end
-`endif
+ `endif
endmodule
\ No newline at end of file
diff --git a/modem.gprj b/modem.gprj
index e482476..df13a1e 100644
--- a/modem.gprj
+++ b/modem.gprj
@@ -6,7 +6,7 @@
gw1nsr4c-009
-
+
diff --git a/modem.gprj.user b/modem.gprj.user
index 636e49e..b6a562f 100644
--- a/modem.gprj.user
+++ b/modem.gprj.user
@@ -22,6 +22,6 @@
- 000000ff00000001fd0000000200000000000001000000029ffc0200000001fc000000360000029f0000009501000018fa000000000200000003fb00000030004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00440065007300690067006e0100000000ffffffff0000006100fffffffb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00500072006f00630065007300730100000000ffffffff0000005d00fffffffb00000036004600700067006100500072006f006a006500630074002e00500061006e0065006c002e0048006900650072006100720063006800790100000000ffffffff0000007c00ffffff00000003000004f60000010afc0100000001fc00000000000004f6000000a100fffffffa000000000100000002fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00470065006e006500720061006c0100000000ffffffff0000004c00fffffffb0000002e004600700067006100500072006f006a006500630074002e00500061006e0065006c002e004900730073007500650100000000ffffffff000000a100ffffff000003f00000029f00000004000000040000000800000008fc000000010000000200000004000000220043006f00720065002e0054006f006f006c006200610072002e00460069006c00650100000000ffffffff0000000000000000000000220043006f00720065002e0054006f006f006c006200610072002e004500640069007401000000a8ffffffff0000000000000000000000240043006f00720065002e0054006f006f006c006200610072002e0054006f006f006c00730100000174ffffffff0000000000000000000000280043006f00720065002e0054006f006f006c006200610072002e00500072006f0063006500730073010000024fffffffff0000000000000000
+
312e30313131000000ff00000000fd000000020000000000000100000002befc0200000001fc00000039000002be0000008401000018fa000000010200000002fb0000001c0044006f0063006b00650072002e00530075006d006d0061007200790100000000ffffffff0000006b00fffffffb0000001c0044006f0063006b00650072002e004e00650074006c0069007300740100000000ffffffff0000005d00ffffff00000003000004f6000000fefc0100000001fc00000000000004f60000007b00fffffffa00000001010000000bfb0000001c0044006f0063006b00650072002e004d0065007300730061006700650100000000ffffffff0000005c00fffffffb0000002c0044006f0063006b00650072002e0049002f004f002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004a00fffffffb000000380044006f0063006b00650072002e005000720069006d00690074006900760065002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004a00fffffffb000000300044006f0063006b00650072002e00470072006f00750070002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004a00fffffffb000000360044006f0063006b00650072002e005200650073006f0075007200630065002e005200650073006500720076006100740069006f006e0100000000ffffffff0000004a00fffffffb000000380044006f0063006b00650072002e0043006c006f0063006b002e004e00650074002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004a00fffffffb000000420044006f0063006b00650072002e00470043004c004b002e005000720069006d00690074006900760065002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004a00fffffffb000000420044006f0063006b00650072002e00480043004c004b002e005000720069006d00690074006900760065002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004a00fffffffb000000440044006f0063006b00650072002e00470043004c004b0032002e005000720069006d00690074006900760065002e0043006f006e00730074007200610069006e007400730000000000ffffffff0000004a00fffffffb000000460044006f0063006b00650072002e00480043004c004b00350041002e005000720069006d00690074006900760065002e0043006f006e00730074007200610069006e007400730000000000ffffffff0000004a00fffffffb0000002e0044006f0063006b00650072002e0056007200650066002e0043006f006e00730074007200610069006e007400730100000000ffffffff0000004a00ffffff000003f0000002be00000004000000040000000800000008fc000000010000000200000001000000180054006f006f006c004200610072002e00460069006c00650100000000ffffffff0000000000000000
diff --git a/scripts/run_postsim.sh b/scripts/run_postsim.sh
index 9a9cd0d..e81214a 100755
--- a/scripts/run_postsim.sh
+++ b/scripts/run_postsim.sh
@@ -1,7 +1,7 @@
cvc \
+define+TIMING_SIM \
+acc \
- +sdfverbose \
+ +sdf_noerrors +sdf_nowarns \
+show_canceled_e +suppress_warns+653+3102 \
-v SIM/prim_tsim.v \
impl/pnr/modem.vo \
diff --git a/scripts/run_sim.sh b/scripts/run_sim.sh
index 61710c1..c790714 100755
--- a/scripts/run_sim.sh
+++ b/scripts/run_sim.sh
@@ -7,6 +7,8 @@
cvc +acc \
+show_canceled_e +suppress_warns+653+3102 \
-v SIM/prim_tsim.v \
+ +define+FAST_PLL_SIM \
+ IP/gw_pllvr/gw_pllvr.v \
HW/toplevel.v \
SIM/toplevel_tb.v \
+librescan