93 lines
1.8 KiB
Plaintext
93 lines
1.8 KiB
Plaintext
{
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"board": {
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"3dviewports": [],
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"ipc2581": {
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"bom_rev": "",
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"dist": "",
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"distpn": "",
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"internal_id": "",
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"mfg": "",
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"mpn": "",
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"sch_revision": ""
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},
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"layer_pairs": [],
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"layer_presets": [],
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"viewports": []
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},
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"boards": [],
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"component_class_settings": {
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"assignments": [],
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"meta": {
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"version": 0
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},
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"sheet_component_classes": {
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"enabled": false
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}
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},
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"cvpcb": {
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"equivalence_files": []
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},
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"libraries": {
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"pinned_footprint_libs": [],
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"pinned_symbol_libs": []
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},
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"meta": {
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"filename": "z80_backplane.kicad_pro",
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"version": 3
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},
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"net_settings": {
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"classes": [
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{
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"bus_width": 12,
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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"line_style": 0,
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"microvia_diameter": 0.3,
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"microvia_drill": 0.1,
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"name": "Default",
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"priority": 2147483647,
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 0.2,
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"tuning_profile": "",
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"via_diameter": 0.6,
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"via_drill": 0.3,
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"wire_width": 6
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}
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],
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"meta": {
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"version": 5
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},
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"net_colors": null,
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"netclass_assignments": null,
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"netclass_patterns": []
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},
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"pcbnew": {
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"last_paths": {
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"idf": "",
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"netlist": "",
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"plot": "",
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"specctra_dsn": "",
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"step": "",
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"vrml": ""
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},
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"page_layout_descr_file": ""
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},
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"schematic": {
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"bus_aliases": {},
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"legacy_lib_dir": "",
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"legacy_lib_list": [],
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"top_level_sheets": []
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},
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"sheets": [],
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"text_variables": {},
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"tuning_profiles": {
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"meta": {
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"version": 0
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},
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"tuning_profiles_impedance_geometric": []
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}
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}
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